Programmable scan-based logic built-in self test

被引：2
|
作者：
Lai, Liyang [1 ]
Cheng, Wu-Tung [1 ]
Rinderknecht, Thomas [1 ]
机构：
[1] Mentor Graph Corp, Wilsonville, OR 97070 USA
来源：
PROCEEDINGS OF THE 16TH ASIAN TEST SYMPOSIUM | 2007年
关键词：
D O I：
10.1109/ATS.2007.45
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents a programmable approach for performing scan-based logic Built-In Self Test. This approach combines the techniques of reseeding and weighted random patterns testing. Reseeding is used to encode the bias cube and weighted patterns are used to fine tune the weight set. Experimental results show fault coverage comparable to ATPG can be achieved. Most importantly, the scheme fits well in the system test environment and high fault coverage can be obtained with a small number of reconfigurations on the BIST controller.
引用
收藏
页码：371 / 377
页数：7
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