Direct root computation architecture for algebraic soft-decision decoding of reed-solomon codes

被引：2

作者：

Ma, Jun ^{[1
]}

Vardy, Alexander ^{[1
]}

Wang, Zhongfeng ^{[2
]}

Chen, Qinqin ^{[2
]}

机构：

[1] Univ Calif San Diego, Dept Elect Engn, La Jolla, CA 92093 USA

[2] Oregon State Univ, Sch EECS, Corvallis, OR 97331 USA

来源：

2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 | 2007年

关键词：

D O I：

10.1109/ISCAS.2007.378492

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Algebraic soft-decision decoding [4] is a recent breakthrough in decoding of Reed-Solomon codes and it achieves significant decoding gain over conventional hard-decision decoding. In the bivariate polynomial factorization step of the new decoding algorithm, solving polynomial equations is required and it may contribute to a significant portion of the overall decoding latency. In this paper, we present a low-latency direct root computation architecture, which should lead to a factorization architecture that is of lower latency and more area efficient.

引用

页码：1409 / +

页数：2

共 50 条

[41] Algebraic Soft-Decision Decoder Architectures for Long Reed-Solomon Codes
Zhang, Xinmiao
Zhu, Jiangli
[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2010, 57 (10) : 787 - 792
[42] Reduced complexity interpolation architecture for soft-decision Reed-Solomon decoding
Zhang, Xinmiao
[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2006, 14 (10) : 1156 - 1161
[43] Architecture and implementation of an interpolation processor for soft-decision Reed-Solomon decoding
Gross, Warren J.
Kschischang, Frank R.
Gulak, P. Glenn
[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2007, 15 (03) : 309 - 318
[44] Performance enhancements for algebraic soft decision decoding of Reed-Solomon codes
El-Khamy, M
McEliece, RJ
Harel, J
[J]. 2004 IEEE INTERNATIONAL SYMPOSIUM ON INFORMATION THEORY, PROCEEDINGS, 2004, : 421 - 421
[45] Soft decision decoding of Reed-Solomon codes
Ponnampalam, V
Vucetic, B
[J]. IEEE TRANSACTIONS ON COMMUNICATIONS, 2002, 50 (11) : 1758 - 1768
[46] FPGA implementation of an interpolation processor for soft-decision decoding of Reed-Solomon codes
Chen, Qinqin
Wang, Zhongfeng
Ma, Jun
[J]. 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 2100 - +
[47] Waterfilling-like multiplicity assignment algorithm for algebraic soft-decision decoding of Reed-Solomon codes
Huang, Qin
Wu, Jiang
Zhao, Chunming
You, Xiaohu
[J]. 2007 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS, VOLS 1-14, 2007, : 6210 - 6213
[48] Reliability-based forward recursive algorithms for algebraic soft-decision decoding of Reed-Solomon codes
Xia, Haitao
Cruz, J. R.
[J]. IEEE TRANSACTIONS ON COMMUNICATIONS, 2007, 55 (07) : 1273 - 1278
[49] FPGA implementation of an interpolation processor for soft-decision decoding of reed-solomon codes
School of EECS, Oregon Sate University, Corvallis, OR 97331-3211, United States
不详
[J]. Proc IEEE Int Symp Circuits Syst, 2007, (2100-2103):
[50] Soft-decision decoding of Reed-Solomon codes on magnetic recording channels with erasures
Xia, HT
Cruz, JR
[J]. 2003 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS, VOLS 1-5: NEW FRONTIERS IN TELECOMMUNICATIONS, 2003, : 2909 - 2913

← 1 2 3 4 5 →