A Modular Multilevel Converter Pulse Generation and Capacitor Voltage Balance Method Optimized for FPGA Implementation

To generate numerous gating signals at a fast rate, industry controllers of modular multilevel converter (MMC) usually implement the pulse generation function in field-programmable gate array (FPGA) boards. Many methods of submodule (SM) capacitor voltage balance control (VBC) require knowing the gating signals and are therefore also implemented in the same FPGA. As the number of SMs in an MMC increases, both the latency and required resources for the implementation could become too large to meet the control requirements or fit into the FPGA. Conventional methods impose a limitation on the design of large MMC. This paper presents a pulse generation and VBC method that is optimized for FPGA implementation. With least comparison operation, this method produces the same valve voltage as other modulation methods, and it removes the need for a sorting operation in VBC, which is the main difficulty in FPGA implementation. The proposed method is implemented in the FPGA-based RT-LAB real-time simulator and tested in a hardware-in-the-loop setup. The performance of this method is validated in various tests.