Method to extract parameters of power law for nano-scale SiON pMOSFETs under negative bias temperature instability

被引:1
|
作者
Yun, Yeohyeok [1 ]
Kim, Gang-Jun [2 ]
Seo, Ji-Hoon [2 ]
Son, Donghee [2 ]
Kang, Bongkoo [1 ]
机构
[1] Pohang Univ Sci & Technol, Dept Elect Engn, Pohang 790784, Gyeongbuk, South Korea
[2] Samsung Elect, Memory Div, Hwasung 445701, Gyeonggi, South Korea
关键词
SiON dielectrics; Fast measurement; Slow measurement; Interface trap; Fast hole trapping; DEPENDENT DEGRADATION; INTERFACE TRAPS; NBTI; NITROGEN; STRESS; CHARGE; MOSFET;
D O I
10.1016/j.microrel.2018.07.056
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes a fast and accurate method to extract parameters of the power law for nano-scale SiON pMOSFETs under negative bias temperature instability (NBTI), which is useful for an accurate estimation of NBTI lifetime. Experimental results show that accurate extraction of the time exponent n of the power law was obstructed by either fast trapping of minority carriers or damage recovery during measurement of threshold voltage V-th. These obstructing effects were eliminated using Delta V(th)s obtained from fast and slow measurement-stress-measurement (MSM) procedures. The experimental SiON pMOSFETs had n approximate to 1/4, an activation energy E-alpha = 0.04 eV for the fast recoverable degradation, and E-alpha = 0.2 eV for the slow permanent degradation. Based on these experimental observations, a method to estimate NBTI lifetime is proposed.
引用
收藏
页码:191 / 195
页数:5
相关论文
共 11 条
  • [1] Negative bias temperature instability of pMOSFETs with ultra-thin SiON gate dielectrics
    Tsujikawa, S
    Mine, T
    Watanabe, K
    Shimamoto, Y
    Tsuchiya, R
    Ohnishi, K
    Onai, T
    Yugami, J
    Kimura, S
    41ST ANNUAL PROCEEDINGS: INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, 2003, : 183 - 188
  • [2] Atomic scale defects in the Si/SiON system and the negative bias temperature instability
    Lenahan, PM
    2004 INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, 2004, : 299 - 302
  • [3] Difference analysis method for negative bias temperature instability lifetime prediction in deeply scaled pMOSFETs
    Liao, Yiming
    Ji, Xiaoli
    Zhang, Chengxu
    Huang, Xiaolin
    Xu, Yue
    Yan, Feng
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2017, 56 (04)
  • [4] Difference analysis method for negative bias temperature instability lifetime prediction in deeply scaled pMOSFETs
    Liao, Yiming
    Ji, Xiaoli
    Zhang, Chengxu
    Huang, Xiaolin
    Xu, Yue
    Yan, Feng
    Japanese Journal of Applied Physics, 2017, 56 (04):
  • [5] Influence of nitrogen in ultra-thin SiON on negative bias temperature instability under AC stress
    Mitani, Y
    IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST, 2004, : 117 - 120
  • [6] A method for negative bias temperature instability (NBTI) measurements on power VDMOS transistors
    Prijic, A.
    Dankovic, D.
    Vracar, Lj
    Manic, I.
    Prijic, Z.
    Stojadinovic, N.
    MEASUREMENT SCIENCE AND TECHNOLOGY, 2012, 23 (08)
  • [7] Evaluation of negative bias temperature instability in ultra-thin gate oxide pMOSFETs using a new on-line PDO method
    Ji Zhi-Gang
    Xu Ming-Zhen
    Tan Chang-Hua
    CHINESE PHYSICS, 2006, 15 (10): : 2431 - 2438
  • [8] Interface trap and oxide charge generation under negative bias temperature instability of p -channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics
    Zhu, Shiyang
    Nakajima, Anri
    Ohashi, Takuo
    Miyake, Hideharu
    Journal of Applied Physics, 2005, 98 (11):
  • [9] An Analysis of the Field Dependence of Interface Trap Generation under Negative Bias Temperature Instability Stress using Wentzel-Kramers-Brillouin with Density Gradient Method
    Choi, SeongWook
    Baek, Chang-Ki
    Park, Sooyoung
    Park, Young June
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2011, 50 (01)
  • [10] Characteristics of Gate Current Random Telegraph Signal Noise in SiON/HfO2/TaN p-Type Metal-Oxide-Semiconductor Field-Effect Transistors under Negative Bias Temperature Instability Stress Condition
    Zhang, Liangliang
    Liu, Changze
    Wang, Runsheng
    Huang, Ru
    Yu, Tao
    Zhuge, Jing
    Kirsch, Paul
    Tseng, Hsing-Huang
    Wang, Yangyuan
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2010, 49 (04)