Design and implementation of CMOS rail-to-rail operational amplifiers

被引：5
|
作者：
Lorenzo, Michael Angelo G. [1 ]
Manzano, Arnold Abram S. [1 ]
Gusad, Maria Theresa A. [1 ]
Hizon, John Richard E. [1 ]
Rosales, Marc D. [1 ]
机构：
[1] Univ Philippines, Dept Elect & Elect Engn, Intel Microprocessors Lab, Quezon City 1101, Philippines
来源：
2007 INTERNATIONAL SYMPOSIUM ON COMMUNICATIONS AND INFORMATION TECHNOLOGIES, VOLS 1-3 | 2007年
关键词：
D O I：
10.1109/ISCIT.2007.4391985
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The paper presents the design and implementation of six operational amplifiers with rail-to-rail input and output capability. The study characterizes several rail-to-rail input and output stages and the dependence of the op-amp's operation on different design parameters to formulate a standard design methodology that can serve as a guide for future researches and projects in the area of rail-to-rail amplifiers. The report shows the effects of the rail-to-rail stages on the op-amp's input common-mode range and output voltage swing range. The op-amps are implemented in 0.25um CMOS process and the simulation results achieve specifications such as gain, bandwidth, offset voltages and common-mode rejection ratio comparable with commercially available circuits.
引用
收藏
页码：61 / 66
页数：6
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