A novel nanowire channel poly-Si TFT functioning as transistor and nonvolatile SONOS memory

被引:48
|
作者
Chen, Shih-Ching [1 ]
Chang, Ting-Chang
Liu, Po-Tsun
Wu, Yung-Chun
Lin, Po-Shun
Tseng, Bae-Heng
Shy, Jang-Hung
Sze, S. M.
Chang, Chun-Yen
Lien, Chen-Hsin
机构
[1] Natl Tsing Hua Univ, Inst Elect Engn, Hsinchu 300, Taiwan
[2] Natl Sun Yat Sen Univ, Dept Phys, Kaohsiung 804, Taiwan
[3] Natl Sun Yat Sen Univ, Inst Electroopt Engn, Kaohsiung 804, Taiwan
[4] Natl Sun Yat Sen Univ, Ctr Nanosci & Nanotechnol, Kaohsiung 804, Taiwan
[5] Natl Chiao Tung Univ, Dept Photon, Hsinchu 300, Taiwan
[6] Natl Chiao Tung Univ, Display Inst, Hsinchu 300, Taiwan
[7] Natl Tsing Hua Univ, Dept Engn & Syst Sci, Hsinchu 300, Taiwan
[8] Natl Sun Yat Sen Univ, Inst Mat Sci & Engn, Kaohsiung 804, Taiwan
[9] Natl Chiao Tung Univ, Inst Elect, Hsinchu 300, Taiwan
关键词
nanowire (NW); nonvolatile memory; polysilicon (poly-Si); silicon-oxide-nitride-oxide-silicon (SONOS); thin-film transistor (TFT);
D O I
10.1109/LED.2007.903885
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this letter, a polycrystalline silicon thin-film transistor consisting of silicon-oxide-nitride-oxide-silicon (SONOS) stack gate dielectric and nanowire (NW) channels was investigated for the applications of transistor and nonvolatile memory. The proposed device, which is named as NW SONOS-TFT, has superior electrical characteristics of transistor, including a higher drain current, a smaller threshold voltage (V-th), and a steeper subthreshold slope. Moreover, the NW SONOS-TFT also can exhibit high program/erase efficiency under adequate bias operation. The duality of both transistor and memory device for the NW SONOS-TFT can be attributed to the trigate structure and channel corner effect.
引用
收藏
页码:809 / 811
页数:3
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