STM investigation of silicon surfaces for fabrication of the kane quantum computer

The fabrication of the Kane quantum computer requires the ability to create an ordered array of phosphorus atoms in an otherwise pure silicon crystal. An intricate fabrication strategy has been employed to achieve these goals, requiring atomic precision imaging and manipulation of silicon based. surfaces. Here we present detailed scanning tunnelling microscopy (STM) results at various stages of this fabrication process. In particular, we demonstrate our ability to prepare low defect density Si(001)2 x 1 surfaces and passivate these surfaces with either monolayer or submonolayer hydrogen coverages. The Si(001)2 x 1 surface is imaged at elevated temperatures and the results suggest that phosphorus arrays fabricated on the surface would survive their encapsulation in silicon provided the substrate is not heated above 750 K. These results highlight the stability of the silicon (001) surface for single atom engineering.