A mmW low power VCO with high tuning range in 28nm FDSOI CMOS technology

被引:0
|
作者
Vallet, Mathieu
Richard, Olivier [1 ]
Deval, Yann [2 ]
Belot, Didier [1 ]
机构
[1] STMicroelectronics, 850 Rue Jean Monnet, F-38920 Crolles, France
[2] IMS Bordeaux, F-33405 Talence, France
关键词
low power VCO; mmW; 40GHz; 28nm FDSOI; Wifi-WiGig convergence; wide tuning range;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 28nm FDSOI CMOS low power VCO working at 40 GHz frequency is presented in this paper. The VCO core only consumes 6mW from a 1 V supply voltage. A wide tuning range of 18.5 % from 38.3 GHz to 46.1 GHz is reached with a tuning voltage from 0 to 1 V. A phase noise higher than -120.5 dBc/Hz at 10 MHz offset has been observed after post-layout simulations. A variable inductance approach has been chosen in order to maintain a sufficiently low phase noise despite significant constraints caused by the advanced technology nodes and the large tuning range needed.
引用
收藏
页码:522 / 525
页数:4
相关论文
共 50 条
  • [21] A Low Phase Noise, Wide Tuning Range 20 GHz Magnetic-Coupled Hartley-VCO in a 28 nm CMOS Technology
    Reiter, Daniel
    Li, Hao
    Knapp, Herbert
    Kammerer, Jonas
    Majied, Soran
    Sene, Badou
    Pohl, Nils
    2019 IEEE RADIO AND WIRELESS SYMPOSIUM (RWS), 2019, : 270 - 272
  • [22] A Hybrid CDAC - Threshold Configuring SAR ADC in 28nm FDSOI CMOS
    Mavrogordatos, Themistoklis G.
    Kilic, Mustafa
    Leblebici, Yusuf
    2017 IEEE 15TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2017, : 213 - 216
  • [23] Enhanced Low Voltage Digital & Analog Mixed-Signal with 28nm FDSOI Technology
    Arnaud, F.
    2015 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S), 2015,
  • [24] SLEEP TRANSISTOR DESIGN IN 28NM CMOS TECHNOLOGY
    Shi, Kaijian
    2013 IEEE 26TH INTERNATIONAL SOC CONFERENCE (SOCC), 2013, : 278 - 283
  • [25] FDSOI versus BULK CMOS at 28 nm node Which Technology for Ultra-Low Power Design?
    Makipaa, Jani
    Billoint, Olivier
    2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2013, : 554 - 557
  • [26] 30 % Frequency-Tuning-Range 60 GHz Push-Push VCO in 28 nm Bulk CMOS Technology
    Rimmelspacher, Johannes
    Weigel, Robert
    Hagelauer, Amelie
    Issakov, Vadim
    2018 IEEE 18TH TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS (SIRF), 2018, : 30 - 32
  • [27] A hybrid CDAC-threshold configuring SAR ADC in 28nm FDSOI CMOS
    Mustafa Kilic
    Themistoklis G. Mavrogordatos
    Yusuf Leblebici
    Analog Integrated Circuits and Signal Processing, 2018, 97 : 397 - 404
  • [28] Process and Temperature Impact on Single-Event Transients in 28nm FDSOI CMOS
    Bartra, Walter Calienes
    Vladimirescu, Andrei
    Reis, Ricardo
    2017 IEEE 8TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS & SYSTEMS (LASCAS), 2017,
  • [29] Optimizing TSPC Frequency Dividers for Always-On Low-Frequency Applications in 28nm FDSOI CMOS
    Xu, Pengcheng
    Gimeno, Cecilia
    Bol, David
    2017 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S), 2017,
  • [30] ESD design challenges in 28nm Hybrid FDSOI/Bulk advanced CMOS process
    Dray, A.
    Guitard, N.
    Fonteneau, P.
    Golanski, D.
    Fenouillet-Beranger, C.
    Beckrich, H.
    Sithanandam, R.
    Benoist, T.
    Legrand, C-A.
    Galy, Ph
    2012 34TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD), 2012,