A 250MHz 20mW 11bit low-hold-pedestal CMOS fully differential track-and-hold circuit

被引：0

作者：

Lee, Tsung-Sum ^{[1
]}

Lu, Chi-Chang ^{[2
]}

Zhan, Jian-Ting ^{[1
]}

机构：

[1] Natl Yunlin Univ Sci & Technol, Dept Elect Engn, Yunlin, Taiwan

[2] Natl Formosa Univ, Dept Elect Engn, Huwei Township 632, Yunlin, Taiwan

来源：

EDSSC: 2007 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, VOLS 1 AND 2, PROCEEDINGS | 2007年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new technique for realizing a very-high-speed low-power low-voltage CMOs fully differential track-and-hold circuit with low hold pedestal is presented. To achieve high sampling linearity the circuit utilizes improved bootstrapped input switch. The fully differential design relaxes the trade-off between sampling speed and the sampling precision. The circuit design of major building blocks is described in detailed. A prototype circuit in a 0.35-mu m CMOs process is integrated and experimental results are presented.

引用

页码：889 / +

页数：3

共 14 条

[1] A 250MHz 11bit 20MW low-hold-pedestal cmos fully differential track-and-hold circuit
Lee, Tsung-Sum
Lu, Chi-Chang
Zhan, Jian-Ting
[J]. 20TH ANNIVERSARY IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, 2007, : 47 - +
[2] A 250MHz 11Bit 20mW CMOS low-hold-pedestal fully differential track-and-hold circuit
Lee, Tsung-Sum
Lu, Chi-Chang
Zhan, Jian-Ting
[J]. 2006 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PAPERS, 2006, : 113 - +
[3] A 330MHz 11 bit 26.4mW CMOS low-hold-pedestal fully differential track-and-hold
Lee, Tsung-Sum
Lu, Chi-Chang
Ho, Chih-Chieh
[J]. 2008 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM, 2008, : 144 - +
[4] A 250 MHz 11 bit 22 mW CMOS low-hold-pedestal fully differential sample-and-hold circuit
Tsung-Sum Lee
Chi-Chang Lu
[J]. Analog Integrated Circuits and Signal Processing, 2009, 58 : 105 - 113
[5] A 250 MHz 11 bit 22 mW CMOS low-hold-pedestal fully differential sample-and-hold circuit
Lee, Tsung-Sum
Lu, Chi-Chang
[J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2009, 58 (02) : 105 - 113
[6] A 330 MHz 11 bit 26.4 mW CMOS Low-Hold-Pedestal Fully Differential Sample-and-Hold Circuit
Tsung-Sum Lee
Chi-Chang Lu
[J]. Circuits, Systems, and Signal Processing, 2011, 30 : 883 - 898
[7] A 330 MHz 11 bit 26.4 mW CMOS Low-Hold-Pedestal Fully Differential Sample-and-Hold Circuit
Lee, Tsung-Sum
Lu, Chi-Chang
[J]. CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2011, 30 (05) : 883 - 898
[8] A 200 MHz 4.8 mW 3 V Fully Differential CMOS Sample-and-Hold Circuit with Low Hold Pedestal
Tsung-Sum Lee
Chi-Chang Lu
[J]. Analog Integrated Circuits and Signal Processing, 2005, 45 : 37 - 46
[9] A 200 MHz 4.8 mW 3 V fully differential CMOS sample-and-hold circuit with low hold pedestal
Lee, TS
Lu, CC
[J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2005, 45 (01) : 37 - 46
[10] A fully differential low-voltage CMOS high-speed track-and-hold circuit
Lee, TS
Lu, CC
[J]. PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING, 2003, : 397 - 400

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