Compact Low-Voltage CMOS Current-Mode Multiplier/Divider

被引：0

作者：

Lopez-Martin, Antonio J. ^{[1
]}

De La Cruz Blas, Carlos A. ^{[1
]}

Ramirez-Angulo, Jaime ^{[2
]}

Carvajal, Ramon G. ^{[3
]}

机构：

[1] Univ Publ Navarra, Dept Elect & Elect Eng, Pamplona, Spain

[2] New Mexico State Univ, Klipsch Sch Elect & Comp Engn, Las Cruces, NM USA

[3] Univ Seville, Escuela Super Ingn, Seville, Spain

来源：

2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS | 2010年

关键词：

ANALOG MULTIPLIER; CIRCUITS;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A compact analog multiplier/divider circuit operating in current-mode is presented featuring low supply voltage, low area requirements and wide dynamic range. It is suited to standard digital CMOS processes and can be successfully employed in a wide range of analog signal processing applications. Measurement results for a 0.5 mu m CMOS test chip prototype are presented. The circuit consumes 120 mu W using a single supply voltage of 1.5V and requires a silicon area of 150 mu m x 140 mu m.

引用

页码：1583 / 1586

页数：4

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