共 34 条
- [1] How can the results of silicon debug justify the investment in design-for-debug infrastructure? [J]. 2007 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, 2007, : 1026 - 1026
- [2] A reconfigurable Design-for-Debug infrastructure for SoCs [J]. 43RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2006, 2006, : 7 - +
- [3] Survey of design-for-debug of VLSI [J]. Jisuanji Yanjiu yu Fazhan/Computer Research and Development, 2012, 49 (01): : 21 - 34
- [4] Design-for-debug to address next-generation SoC debug concerns [J]. 2007 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, 2007, : 1031 - 1031
- [5] Design-for-debug for post-silicon validation: Can high-level descriptions help? [J]. 2009 IEEE INTERNATIONAL HIGH LEVEL DESIGN VALIDATION AND TEST WORKSHOP, 2009, : 172 - 175
- [6] Design-for-debug: A vital aspect in education [J]. 2007 IEEE INTERNATIONAL CONFERENCE ON MICROELECTRONIC SYSTEMS EDUCATION, PROCEEDINGS, 2007, : 65 - +
- [7] Design-for-Debug Routing for FIB Probing [J]. 2014 DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION (DATE), 2014,
- [8] Secure Design-for-Debug for Systems-on-Chip [J]. 2015 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2015,
- [10] Design-for-debug in hardware/software co-design [J]. PROCEEDINGS OF THE FIFTH INTERNATIONAL WORKSHOP ON HARDWARE/SOFTWARE CODESIGN (CODES/CASHE '97), 1997, : 35 - 39