A 90nm 10-bit 1 GS/s current-steering DAC with 1-V supply voltage

被引：3

作者：

Yu, Chuch-Hao ^{[1
]}

Hsieh, Ching-Hsuan ^{[1
]}

Shia, Tim-Kuei ^{[1
]}

Chen, Wen-Tzao ^{[1
]}

机构：

[1] STC Ind Technol Res Inst, Hsinchu, Taiwan

来源：

2008 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM | 2008年

关键词：

D O I：

10.1109/VDAT.2008.4542461

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper discusses the design of a 90 nm CMOS 1V 10-bit 1GS/s current-steering D/A converter. The proposed design operates under low supply voltage of 1V and gives a large differential full-scale output of 0.5 V-ppd. A wide full-scale current range of 2-10mA is designed and the output impedance of the DAC is optimized for different full-scale currents by a bias circuit related to them. The post-layout simulation results show that the SFDR and ENOB are 50.64dBc and 7.86 bit respectively with a full-scale 308.59MHz input at 1GS/s and more than 50 dB and 8 bit respectively when the signal bandwidth is less than 200MHz. The converter consumes a total power of 23mW at 1 V supply. It is designed for 90 nm CMOS technology and has an active area of 0.47 mm(2).

引用

页码：255 / 258

页数：4

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