Low-complexity interpolation architecture for soft-decision Reed-Solomon decoding

被引：6
|
作者：
Zhang, Xinmiao [1 ]
Zhu, Jiangli [1 ]
机构：
[1] Case Western Reserve Univ, Dept Elect Engn & Comp Sci, Cleveland, OH 44106 USA
来源：
2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 | 2007年
关键词：
D O I：
10.1109/ISCAS.2007.378493
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
Reed-Solomon (RS) codes have very broad applications in digital communication and storage systems. Among the decoding algorithms of RS codes, the Koetter-Vardy (KV) soft-decision decoding algorithm can achieve substantial coding gain with a polynomial complexity. One of the major steps of the KV algorithm is the interpolation. Recently, a new algorithm was proposed to solve the interpolation problem. Compared to previous efforts, this algorithm is computationally simpler, and thus can potentially lead to practical high-speed hardware implementations of the KV algorithm. This paper proposes novel transformation techniques to further reduce the hardware complexity of the new interpolation algorithm. In addition, efficient VLSI architectures are provided for the new algorithm.
引用
收藏
页码：1413 / 1416
页数：4
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