High-performance logic circuits constructed on single CdS nanowires

被引：143
|
作者：
Ma, Ren-Min
Dai, Lun [1 ]
Huo, Hai-Bin
Xu, Wan-Jin
Oin, G. G.
机构：
[1] Peking Univ, Sch Phys, State Key Lab Mesoscop Phys, Beijing 100871, Peoples R China
[2] Chinese Acad Sci, Key Lab Semicond Mat Sci, Beijing 100083, Peoples R China
来源：
NANO LETTERS | 2007年 / 7卷 / 11期
关键词：
D O I：
10.1021/nl0715286
中图分类号：
O6 [化学];
学科分类号：
0703 ;
摘要：
A high-performance NOT logic gate (inverter) was constructed by combining two identical n-channel metal-semiconductor field-effect transistors (MESFETs) made on a single US nanowire (NW). The inverter has a voltage gain as high as 83, which is the highest reported so far for inverters made on one-dimensional nanomaterials. The MESFETs used in the inverter circuit show excellent transistor performance, such as high on/off current ratio (similar to 10(7)), low threshold voltage (similar to-0.4 V), and low subthreshold swing (similar to 60 mV/dec). With the assembly of three identical NW MESFETs, NOR and NAND gates have been constructed.
引用
收藏
页码：3300 / 3304
页数：5
相关论文
共 50 条
  • [21] Pseudo-footless CMOS domino logic circuits for high-performance VLSI designs
    Wang, JS
    Shieh, SJ
    Yeh, C
    Yeh, YH
    2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, 2004, : 401 - 404
  • [22] A Novel Technique to Design GNRFET Based Ternary Logic Circuits for High-Performance Applications
    Venkatramana, P.
    Basha, Shaik Javid
    Sankarnath, V.
    Rao, Y. Mallikarjuna
    Subramanyam, M.V.
    Russian Microelectronics, 2024, 53 (05) : 492 - 499
  • [23] A time borrowing selectively clocked skewed logic for high-performance circuits in scaled technologies
    Sirisantana, N
    Roy, K
    ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2003, : 181 - 184
  • [24] High-performance single-cycle memristive multifunction logic architecture
    Yang, X.
    Adeyemo, A. A.
    Jabir, A.
    Mathew, J.
    ELECTRONICS LETTERS, 2016, 52 (11) : 906 - 907
  • [25] Inkjet Printed Single-Walled Carbon Nanotube Based Ambipolar and Unipolar Transistors for High-Performance Complementary Logic Circuits
    Bucella, Sadir Gabriele
    Salazar-Rios, Jorge Mario
    Derenskyi, Vladimir
    Fritsch, Martin
    Scherf, Ullrich
    Loi, Maria Antonietta
    Caironi, Mario
    ADVANCED ELECTRONIC MATERIALS, 2016, 2 (06):
  • [26] Suspended Single-Crystal Diamond Nanowires for High-Performance Nanoelectromechanical Switches
    Liao, Meiyong
    Hishita, Shunichi
    Watanabe, Eiichiro
    Koizumi, Satoshi
    Koide, Yasuo
    ADVANCED MATERIALS, 2010, 22 (47) : 5393 - +
  • [27] Energy optimization of high-performance circuits
    Dao, HQ
    Zeydel, BR
    Oklobdzija, VG
    INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, 2003, 2799 : 399 - 408
  • [28] High-performance asynchronous pipeline circuits
    Yun, KY
    Beerel, PA
    Arceo, J
    SECOND INTERNATIONAL SYMPOSIUM ON ADVANCED RESEARCH IN ASYNCHRONOUS CIRCUITS AND SYSTEMS, PROCEEDINGS, 1996, : 17 - 28
  • [29] Register Placement for High-Performance Circuits
    Chiang, Mei-Fang
    Okamoto, Takumi
    Yoshimura, Takeshi
    DATE: 2009 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3, 2009, : 1470 - +
  • [30] High-Performance Fully Nanostructured Photodetector with Single-Crystalline CdS Nanotubes as Active Layer and Very Long Ag Nanowires as Transparent Electrodes
    An, Qinwei
    Meng, Xianquan
    Sun, Pan
    ACS APPLIED MATERIALS & INTERFACES, 2015, 7 (41) : 22941 - 22952
12345