A high performance of dual-gate TFTs with triple floating N+ channel

被引：0
|
作者：
Park, Hyung-Seok [1 ]
Lee, Dae Yeon [1 ]
Jung, Min-Chul [1 ]
Hong, Seung-Woo [1 ]
Sung, Man Young [1 ]
Kang, Ey Goo
Rhie, Dong-Hee
机构：
[1] Korea Univ, Dept Elect Engn, Seoul 136701, South Korea
来源：
PROCEEDINGS OF THE TWENTY-FIFTH INTERNATIONAL DISPLAY RESEARCH CONFERENCE - EURODISPLAY 2005 | 2005年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We have simulated a dual-gate TFT which has triple floating n+ channel to improve the on-current of the dual-gate TFT. We achieved a low hole concentration at the source and channel junction causes the improvement the potential barrier so that we observed the reduction of the kink-effect. In this paper, we observed the reduction of the kink-effect compared with the conventional single-gate TFT and the improvement of the on-current compared with the conventional dual-gate TFT.
引用
收藏
页码：448 / 451
页数：4
相关论文
共 50 条
  • [1] High-Performance SLS Nanowire TFTs With Dual-Gate Structure
    Kang, Tsung-Kuei
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (07) : 2276 - 2281
  • [2] A Study on High Performance, Dual-Gate a-IZO/a-IGZTO TFTs With Excellent Stability
    Nahar, Sabiqun
    Priyadarshi, Sunaina
    Billah, Mohammad Masum
    Arnob, Md Redowan Mahmud
    Rahaman, Abidur
    Kim, Jung Bae
    Bae, Yang Ho
    Ma, Custer
    Lin, Youron
    Chen, Berlin
    Yang, Lynn
    Grillmayer, Juergen
    Hung, Zero
    Yim, Dong Kil
    Choi, Soo Young
    Beltrando, Bastien
    Pesic, Milan
    Jang, Jin
    IEEE ELECTRON DEVICE LETTERS, 2024, 45 (10) : 1835 - 1838
  • [3] High-Voltage a-Si TFTs Using Dual-Gate With a Common Gate Structure by Channel Electrons Concentration Regulation
    Liu, Jiaze
    Liu, Rongyue
    Zhan, Shaohu
    Luo, Qin
    Chen, Rifei
    Cheng, Xing
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2023, 70 (04) : 1682 - 1686
  • [4] Contact Length Scaling in Dual-Gate IGZO TFTs
    Wu, Zijing
    Niu, Jiebin
    Lu, Congyan
    Bai, Ziheng
    Chen, Kaifei
    Wu, Zhenhua
    Lu, Wendong
    Liu, Menggan
    Liao, Fuxi
    Geng, Di
    Lu, Nianduan
    Yang, Guanhua
    Li, Ling
    IEEE ELECTRON DEVICE LETTERS, 2024, 45 (03) : 408 - 411
  • [5] Bistaggered Contact Geometry for Symmetric Dual-Gate Organic TFTs
    Kwon, Jimin
    Jung, Sungyeop
    Kim, Yun-Hi
    Jung, Sungjune
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2019, 66 (07) : 3118 - 3123
  • [6] Static characteristics of a-Si:H dual-gate TFTs
    Servati, P
    Karim, KS
    Nathan, A
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (04) : 926 - 932
  • [7] High-performance dual-gate graphene pH sensors
    Le, Son T.
    Cho, Seulki
    Zaslavsky, Alexander
    Richter, Curt A.
    Balijepalli, Arvind K.
    APPLIED PHYSICS LETTERS, 2022, 120 (26)
  • [8] A physical channel-potential and drain-current model for asymmetric dual-gate a-IGZO TFTs
    Minxi CAI
    Ruohe YAO
    ScienceChina(InformationSciences), 2019, 62 (06) : 180 - 182
  • [9] A physical channel-potential and drain-current model for asymmetric dual-gate a-IGZO TFTs
    Minxi Cai
    Ruohe Yao
    Science China Information Sciences, 2019, 62
  • [10] A physical channel-potential and drain-current model for asymmetric dual-gate a-IGZO TFTs
    Cai, Minxi
    Yao, Ruohe
    SCIENCE CHINA-INFORMATION SCIENCES, 2019, 62 (06)
12345