Family of fast mixed arithmetic logic transforms for multiple-valued input binary functions

被引：3
|
作者：
Rahardja, S [1 ]
Falkowski, BJ [1 ]
机构：
[1] NANYANG TECHNOL UNIV,SCH ELECTR & ELECT ENGN,SINGAPORE 639798,SINGAPORE
来源：
1996 26TH INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC, PROCEEDINGS | 1996年
关键词：
D O I：
10.1109/ISMVL.1996.508331
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
引用
收藏
页码：24 / 29
页数：6
相关论文
共 50 条
  • [21] On low cost realization of multiple-valued logic functions
    Hozumi, T
    Kakusho, O
    Hata, Y
    [J]. 1998 28TH IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC - PROCEEDINGS, 1998, : 233 - 238
  • [22] A Frontier algorithm for optimization of multiple-valued logic functions
    Abd-El-Barr, M
    Abd-El-Barr, MM
    [J]. 1998 28TH IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC - PROCEEDINGS, 1998, : 245 - 249
  • [23] USE OF A FAST MULTIDIMENSIONAL FOURIER TRANSFORMATION FOR POLYNOMIAL REPRESENTATION OF MULTIPLE-VALUED LOGIC FUNCTIONS
    LABUNETS, VG
    SITNIKOV, OP
    [J]. ENGINEERING CYBERNETICS, 1978, 16 (05): : 152 - 155
  • [24] Multiple-Valued Logic Networks with Regular Structure Obtained from Fast Fourier Transforms on Finite Groups
    Stankovic, Radomir S.
    Astola, Jaakko
    Moraga, Claudio
    [J]. 2011 41ST IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL), 2011, : 54 - 61
  • [25] A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logic
    Berg, Y
    Næss, O
    Aunet, S
    Lomsdalen, J
    Hovin, M
    [J]. ICES 2002: 9TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-111, CONFERENCE PROCEEDINGS, 2002, : 579 - 582
  • [26] Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic
    Berg, Y
    Næss, O
    Aunet, S
    Jensen, R
    Hovin, M
    [J]. 2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V, PROCEEDINGS, 2002, : 385 - 388
  • [27] Minimizing ESCT forms for two-variable multiple-valued input binary output functions
    Mizuki, Takaaki
    Mikami, Daizo
    Sone, Hideaki
    [J]. DISCRETE APPLIED MATHEMATICS, 2014, 169 : 186 - 194
  • [28] MULTIPLE-VALUED LOGIC FOR OPTOELECTRONICS
    ABRAHAM, G
    [J]. OPTICAL ENGINEERING, 1986, 25 (01) : 3 - 13
  • [29] MULTIPLE-VALUED LOGIC - AN IMPLEMENTATION
    DAO, TT
    CAMPBELL, DM
    [J]. OPTICAL ENGINEERING, 1986, 25 (01) : 14 - 21
  • [30] MULTIPLE-VALUED LOGIC - INTRODUCTION
    BUTLER, JT
    [J]. COMPUTER, 1988, 21 (04) : 13 - 15
12345