Run-time support for dynamically reconfigurable computing systems

被引:6
|
作者
Edwards, M [1 ]
Green, P [1 ]
机构
[1] Univ Manchester, Dept Computat, Manchester M60 1QD, Lancs, England
关键词
reconfigurable computing; run-time configuration; FPGA systems; real-time operating system;
D O I
10.1016/S1383-7621(03)00068-7
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Reconfigurable computing systems normally consist of an instruction-set processor connected to a block of reconfigurable logic. The reconfigurable logic, for example, an field programmable gate arrays (FPGA), can usually be adapted during the run-time of an application to perform different tasks. This paper describes a novel FPGA support system (FSS) that facilitates the execution of hardware-based tasks on a reconfigurable Xilinx 6264 FPGA connected to an ARM 7 processor. The FSS provides the mechanisms to support the placement, execution, and removal of tasks on the FPGA. A key feature of the FSS is the ability to provide communication facilities between concurrently active hardware and software tasks during the run-time of an application. The design, implementation and status of the FSS are discussed, together with initial results based on the implementation of a wavelet image compression application. The paper concludes by considering how our experiences with this system have influenced the development of an enhanced FSS for the later generation of Xilinx Virtex FPGAs. (C) 2003 Elsevier B.V. All rights reserved.
引用
收藏
页码:267 / 281
页数:15
相关论文
共 50 条
  • [1] A run-time support environment for reconfigurable systems
    Bubb, L
    Edwards, M
    Green, P
    Pimlott, C
    Rees, K
    Stewart, M
    Taylor, A
    Vakondios, M
    Yates, J
    [J]. EUROMICRO SYMPOSIUM ON DIGITAL SYSTEMS DESIGN, PROCEEDINGS, 2001, : 135 - 141
  • [2] Run-time minimization of reconfiguration overhead in dynamically reconfigurable systems
    Resano, J
    Mozos, D
    Verkest, D
    Vernalde, S
    Catthoor, F
    [J]. FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, 2003, 2778 : 585 - 594
  • [3] Reconfigurable Hardware and Intelligent Run-time Systems for Adaptive Computing
    Becker, Juergen
    Braendle, Kurt
    Ullmann, Michael
    [J]. IT-INFORMATION TECHNOLOGY, 2005, 47 (04): : 201 - 206
  • [4] A Framework for Run-time Reconfigurable Systems
    Michael Eisenring
    Marco Platzner
    [J]. The Journal of Supercomputing, 2002, 21 : 145 - 159
  • [5] A framework for run-time reconfigurable systems
    Eisenring, M
    Platzner, M
    [J]. JOURNAL OF SUPERCOMPUTING, 2002, 21 (02): : 145 - 159
  • [6] Configuration relocation and defragmentation for run-time reconfigurable computing
    Compton, K
    Li, ZY
    Cooley, J
    Knol, S
    Hauck, S
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2002, 10 (03) : 209 - 220
  • [7] Run-time requirements verification for reconfigurable systems
    Chatzikonstantinou, George
    Kontogiannis, Kostas
    [J]. INFORMATION AND SOFTWARE TECHNOLOGY, 2016, 75 : 105 - 121
  • [8] Modelling and optimising run-time reconfigurable systems
    Luk, W
    Shirazi, N
    Cheung, PYK
    [J]. IEEE SYMPOSIUM ON FPGAS FOR CUSTOM COMPUTING MACHINES, PROCEEDINGS, 1996, : 167 - 176
  • [9] Designing run-time reconfigurable systems with JHDL
    Bellows, P
    Hutchings, B
    [J]. JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2001, 28 (1-2): : 29 - 45
  • [10] An implementation framework for run-time reconfigurable systems
    Eisenring, M
    Platzner, M
    [J]. PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED PROCESSING TECHNIQUES AND APPLICATIONS, VOLS I-V, 2000, : 151 - 157