Accelerating SoC design using SysML and SystemC

被引:0
|
作者
Raslan, Wasecin [1 ]
Sameh, Alimed [2 ]
机构
[1] Mentor Graph Egypt, 51st Beirut St, Cairo, Egypt
[2] Amer Univ Cairo, Dept Comp Sci, Cairo, Egypt
关键词
electronic system level; ESL; SysML; SystemC; code generation; system on chip; SoC; system level design;
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Increasing design productivity is one of the main challenges facing the semiconductor design roadmap for >= 32 run technology as stated by the International Technology Roadmap for Semiconductors. ITRS. report. Increasing the level of abstraction and increasing the design flow automation level are two of the methodologies Suggested by the ITRS to address the design productivity challenge. Producing executable specifications is another methodology to increase the productivity. This research suggests that the automatic mapping of SysML the system level UML based notations adopted by the Object Management Group. OMG. to the IEEE standardized SystemC. can raise the level of design abstraction in an automated environment that produces an executable specification of the design.
引用
收藏
页码:247 / +
页数:2
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