A Scalable and Fast Microprocessor Design Space Exploration Methodology

被引:5
|
作者
Wang, Lei [1 ]
Tang, Yuxing [1 ]
Deng, Yu [1 ]
Qin, Fangyan [1 ]
Dou, Qiang [1 ]
Zhang, Guangda [2 ]
Zhang, Feipeng [3 ]
机构
[1] Natl Univ Def Technol, Sch Comp Sci, Changsha, Hunan, Peoples R China
[2] Univ Manchester, Sch Comp Sci, Manchester M13 9PL, Lancs, England
[3] Hunan Univ, Coll Finance & Stat, Changsha 410082, Hunan, Peoples R China
关键词
D O I
10.1109/MCSoC.2015.30
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Design space exploration of microprocessor is still a challenging task for processor designers. Due to the huge design space, it is hard to determine the optimal configuration of microarchitecture parameters to satisfy the target performance and power requirements within limited time at the early stage of processor design. In this paper, a Critical Path Analysis directed Design Space Exploration (CPADSE) methodology for design space exploration of microprocessors is proposed. In CPADSE, a dependence graph model is constructed using the profile information generated during the program simulation. Then the critical paths of the dependence graph model are computed and patterns of the critical path are identified. The microarchitecture parameters mostly affecting processor's performance or other metrics can be identified using the Plackett-Burman design method, which is always referenced as sensitivity analysis. Then the result of critical path analysis and sensitivity analysis is further used to guide the selection of search direction in both SA-CPADSE and TB-CPADSE design space search algorithms, which are proposed in this paper. Experiment result shows that for the design space exploration on SPEC 2000 benchmarks, SA-CPADSE obtains 2x speedup over baseline design space exploration algorithm SA-DSE. Additionally, TB-CPADSE on average obtains 4.3x speedup over SA-CPADSE and 7x speedup over SA-DSE. At the end of this paper, we have a detailed discussion about how to extend CPADSE methodology to design space exploration of multicore processors.
引用
收藏
页码:33 / 40
页数:8
相关论文
共 50 条
  • [1] A scalable methodology for cost estimation in a transformational high-level design space exploration environment
    Gerlach, J
    Rosenstiel, W
    [J]. DESIGN, AUTOMATION AND TEST IN EUROPE, PROCEEDINGS, 1998, : 226 - 231
  • [2] Fast exploration of ΔΣADC design space
    Bajdechi, O
    Huijsing, JH
    Gielen, G
    [J]. 2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, PROCEEDINGS, 2002, : 49 - 52
  • [3] On fast exploration of ASIC design space
    Shen, ZX
    Jong, CC
    [J]. 1996 2ND INTERNATIONAL CONFERENCE ON ASIC, PROCEEDINGS, 1996, : 96 - 99
  • [4] Efficient microprocessor design space exploration through statistical simulation
    Eeckhout, L
    Stroobandt, D
    De Bosschere, K
    [J]. 36TH ANNUAL SIMULATION SYMPOSIUM, PROCEEDINGS, 2003, : 233 - 240
  • [5] Effective and Efficient Microprocessor Design Space Exploration Using Unlabeled Design Configurations
    Chen, Tianshi
    Chen, Yunji
    Guo, Qi
    Zhou, Zhi-Hua
    Li, Ling
    Xu, Zhiwei
    [J]. ACM TRANSACTIONS ON INTELLIGENT SYSTEMS AND TECHNOLOGY, 2013, 5 (01)
  • [6] A Fast Design Space Exploration for VLIW Architectures
    Yazdani, Reza
    Sheidaeian, Hamed
    Salehi, Mostafa E.
    [J]. 2014 22ND IRANIAN CONFERENCE ON ELECTRICAL ENGINEERING (ICEE), 2014, : 856 - 861
  • [7] A Design Space Exploration Methodology for Application Specific MPSoC Design
    Singh, Amit Kumar
    Kumar, Akash
    Srikanthan, Thambipillai
    [J]. 2011 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2011, : 339 - +
  • [8] STATS: A framework for microprocessor and system-level design space exploration
    Albonesi, DH
    Koren, I
    [J]. JOURNAL OF SYSTEMS ARCHITECTURE, 1999, 45 (12-13) : 1097 - 1110
  • [9] STATS: A framework for microprocessor and system-level design space exploration
    Albonesi, David H.
    Koren, Israel
    [J]. Journal of Systems Architecture, 1999, 45 (12): : 1097 - 1110
  • [10] Microarchitectural design space exploration made fast
    Guo, Qi
    Chen, Tianshi
    Chen, Yunji
    Li, Ling
    Hu, Weiwu
    [J]. MICROPROCESSORS AND MICROSYSTEMS, 2013, 37 (01) : 41 - 51