A VLSI architecture of 2D wavelet transforms

被引：0

作者：

Achour, C ^{[1
]}

Houle, JL ^{[1
]}

Davidson, J ^{[1
]}

机构：

[1] Ecole Polytech, Montreal, PQ H3C 3A7, Canada

来源：

ICECS 2000: 7TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS & SYSTEMS, VOLS I AND II | 2000年

关键词：

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This paper presents a new implementation of a 2D wavelet transform in a VLSI circuit, for real-time digital signal processing. The parallel algorithm of the 2D wavelet transform (2D-WT) used for designing and implementing this new architecture enhances the performance of computations. The proposed multi-elementary processor architecture of 2D-WT yields a very flexible hardware configuration. This approach offers a high processing speed, relative to other methods, for providing the wavelet coefficients. The 2D-WT is a powerful tool for several applications, the most important one being image processing.

引用

页码：370 / 373

页数：4

共 50 条

[1] Design of an efficient VLSI architecture for 2-D discrete wavelet transforms
Yu, C
Chen, SJ
[J]. IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 1999, 45 (01) : 135 - 140
[2] Efficient VLSI architecture for 2-D inverse discrete wavelet transforms
Yu, C
Chen, SJ
[J]. ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3: ANALOG AND DIGITAL SIGNAL PROCESSING, 1999, : 524 - 527
[3] Design of an efficient VLSI architecture for 2-D discrete wavelet transforms
Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan
[J]. IEEE Trans Consum Electron, 1 (135-140):
[4] 2D DWT VLSI architecture for wavelet image processing
Paek, SK
Kim, LS
[J]. ELECTRONICS LETTERS, 1998, 34 (06) : 537 - 538
[5] VLSI ARCHITECTURE FOR FAST 2D DISCRETE ORTHONORMAL WAVELET TRANSFORM
CHUANG, HYH
CHEN, L
[J]. JOURNAL OF VLSI SIGNAL PROCESSING, 1995, 10 (03): : 225 - 236
[6] VLSI architecture for fast 2D discrete orthonormal wavelet transform
Chuang, Henry Y.H.
Chen, Ling
[J]. Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, 1995, 10 (03): : 225 - 236
[7] Benchmarks for 2D discrete wavelet transforms
Meyer-Bäse, U
[J]. WAVELET APPLICATIONS VI, 1999, 3723 : 286 - 297
[8] An efficient VLSI architecture for lifting based 1D/2D discrete wavelet transform
Basiri, Mohamed Asan M.
Mahammad, Noor Sk
[J]. MICROPROCESSORS AND MICROSYSTEMS, 2016, 47 : 404 - 418
[9] 2D wavelet transforms with a spatially adaptive 2D low pass filter
Abhayaratne, GCK
[J]. NORSIG 2004: PROCEEDINGS OF THE 6TH NORDIC SIGNAL PROCESSING SYMPOSIUM, 2004, 46 : 93 - 96
[10] ASAP - A 2D DFT VLSI processor and architecture
Mellott, JD
Lewis, M
Taylor, F
Coffield, P
[J]. ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 2, 1996, : 261 - 264

← 1 2 3 4 5 →