Self-Referenced Read methodology for EMs

Mainstream memory technologies are continuing to dominate the market. 3D-NAND architectures have opened a new era for flash-based technologies allowing the prosecution of the cost reduction. DRAM technology is breaking the 20nm wall and it is near to produce 4F2 cell. This evolutionary thrust widens the space in the memory hierarchy thus allowing access to Emerging Memory (EM) technologies with performances in between NAND and DRAM. Actual access, however, depends on the level of reliability achieved by the specific EM. In particular, consistency of writing and reading mechanisms is a necessary condition for large scale production. In general, the voltage distribution of logical ones and logical zeros move with time, temperature, number of cycles, and possibly, other parameters, sometimes unknown. We propose an architectural solution applicable to a wide class of memory technologies to structurally provide a solid and reliable reading mechanism. During the reading itself, we produce, directly from the pattern stored in the cells, an adaptive reading reference able to follow these changes. Ensuring, by a proper encoding, a limited weight range for the admissible patterns, and moving the problem in the time domain, we first produce a time event to estimate the position of the lower distribution, and next, by adding an appropriate delay, a reference event to distinguish ones from zeros. Statistical simulations confirm the effectiveness of the methodology.