An ASIC implementation of low power and high throughput blowfish crypto algorithm

被引：17

作者：

Kumar, P. Karthigai ^{[1
]}

Baskaran, K. ^{[2
]}

机构：

[1] Karunya Univ, Dept Elect & Commun Engn, Coimbatore, Tamil Nadu, India

[2] Govt Coll Technol, Dept Comp Sci & Engn, Coimbatore, Tamil Nadu, India

来源：

MICROELECTRONICS JOURNAL | 2010年 / 41卷 / 06期

关键词：

ASIC; Blowfish; Cryptography; Encryption; Low power; Throughput; ENCRYPTION;

D O I：

10.1016/j.mejo.2010.04.004

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Information security has always been important in all aspects of life. It can be all the more important as technology continues to control various operations in our day to day life. Cryptography provides a layer of security in cases, where the medium of transmission is susceptible to interception, by translating a message into a form that cannot be read by an unauthorized third party. Several software implementations of blowfish crypto algorithms are described in the literature, but few attempts have been made to describe hardware implementations. The ultimate objective of the research presented in this paper is to develop low-power, high-throughput, real-time, reliable and secure crypto algorithm, which can be achieved through hardware implementations. The blowfish crypto algorithm is prototyped in 130 nm custom integrated circuit. (C) 2010 Elsevier Ltd. All rights reserved.

引用

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页码：347 / 355

页数：9

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