Implementation of Multiple-Precision Floating-Point Arithmetic on Intel Xeon Phi Coprocessors

被引：1
|
作者：
Takahashi, Daisuke [1 ]
机构：
[1] Univ Tsukuba, Ctr Computat Sci, 1-1-1 Tennodai, Tsukuba, Ibaraki 3058573, Japan
来源：
COMPUTATIONAL SCIENCE AND ITS APPLICATIONS - ICCSA 2016, PT II | 2016年 / 9787卷
关键词：
ALGORITHM; DIVISION;
D O I：
10.1007/978-3-319-42108-7_5
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, we propose an implementation of multiple-precision floating-point addition, subtraction, multiplication, division and square root on Intel Xeon Phi coprocessors. Using propagated carries in multiple-precision floating-point addition is a major obstacle to vectorization and parallelization. By using the carry skip method, the operation of performing propagated carries in the multiple-precision floating-point addition can be vectorized and parallelized. A parallel implementation of floating-point real FFT-based multiplication is presented, as multiplication is a fundamental operation in fast multiple-precision arithmetic. The experimental results of multiple-precision floating-point addition, multiplication, division and square root operations on an Intel Xeon Phi 5110P are then reported.
引用
收藏
页码：60 / 70
页数：11
相关论文
共 50 条
  • [21] Low-Power Multiple-Precision Iterative Floating-Point Multiplier with SIMD Support
    Tan, Dimitri
    Lemonds, Carl E.
    Schulte, Michael J.
    IEEE TRANSACTIONS ON COMPUTERS, 2009, 58 (02) : 175 - 187
  • [22] A Configurable Floating-Point Multiple-Precision Processing Element for HPC and AI Converged Computing
    Mao, Wei
    Li, Kai
    Cheng, Quan
    Dai, Liuyao
    Li, Boyu
    Xie, Xinang
    Li, He
    Lin, Longyang
    Yu, Hao
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2022, 30 (02) : 213 - 226
  • [23] Efficient Multiple-Precision Floating-Point Fused Multiply-Add with Mixed-Precision Support
    Zhang, Hao
    Chen, Dongdong
    Ko, Seok-Bum
    IEEE TRANSACTIONS ON COMPUTERS, 2019, 68 (07) : 1035 - 1048
  • [24] Optimizing Non-Contiguous Memory Access on Intel Xeon Phi Coprocessors
    Ma, Mingfei
    Hou, Jinlong
    Ye, Jason
    Arunachalam, Meena
    Gutierrez, Rafael
    2015 IEEE 17TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS, 2015 IEEE 7TH INTERNATIONAL SYMPOSIUM ON CYBERSPACE SAFETY AND SECURITY, AND 2015 IEEE 12TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (ICESS), 2015, : 1615 - 1620
  • [25] FPGA Implementation of the Multiplication Operation in Multiple-Precision Arithmetic
    Rudnicki, Kamil
    Stefanski, Tomasz P.
    PROCEEDINGS OF THE 24TH INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS - MIXDES 2017, 2017, : 271 - 275
  • [26] Full Correlation Matrix Analysis of fMRI Data on Intel® Xeon Phi™ Coprocessors
    Wang, Yida
    Anderson, Michael J.
    Cohen, Jonathan D.
    Heinecke, Alexander
    Li, Kai
    Satish, Nadathur
    Sundaram, Narayanan
    Turk-Browne, Nicholas B.
    Willke, Theodore L.
    PROCEEDINGS OF SC15: THE INTERNATIONAL CONFERENCE FOR HIGH PERFORMANCE COMPUTING, NETWORKING, STORAGE AND ANALYSIS, 2015,
  • [27] A new architecture for multiple-precision floating-point multiply-add fused unit design
    Huang, Libo
    Shen, Li
    Dai, Kui
    Wang, Zhiying
    18TH IEEE SYMPOSIUM ON COMPUTER ARITHMETIC, PROCEEDINGS, 2007, : 69 - +
  • [28] A Reconfigurable Multiple-Precision Floating-Point Dot Product Unit for High-Performance Computing
    Mao, Wei
    Li, Kai
    Xie, Xinang
    Zhao, Shirui
    Li, He
    Yu, Hao
    PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021), 2021, : 1793 - 1798
  • [29] Floating-point arithmetic
    Boldo, Sylvie
    Jeannerod, Claude-Pierre
    Melquiond, Guillaume
    Muller, Jean-Michel
    ACTA NUMERICA, 2023, 32 : 203 - 290
  • [30] MULTIPLE-PRECISION ARITHMETIC IN C
    KALISKI, BS
    DR DOBBS JOURNAL, 1992, 17 (08): : 40 - &
12345