Implementation of Multiple-Precision Floating-Point Arithmetic on Intel Xeon Phi Coprocessors

被引：1
|
作者：
Takahashi, Daisuke [1 ]
机构：
[1] Univ Tsukuba, Ctr Computat Sci, 1-1-1 Tennodai, Tsukuba, Ibaraki 3058573, Japan
来源：
COMPUTATIONAL SCIENCE AND ITS APPLICATIONS - ICCSA 2016, PT II | 2016年 / 9787卷
关键词：
ALGORITHM; DIVISION;
D O I：
10.1007/978-3-319-42108-7_5
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, we propose an implementation of multiple-precision floating-point addition, subtraction, multiplication, division and square root on Intel Xeon Phi coprocessors. Using propagated carries in multiple-precision floating-point addition is a major obstacle to vectorization and parallelization. By using the carry skip method, the operation of performing propagated carries in the multiple-precision floating-point addition can be vectorized and parallelized. A parallel implementation of floating-point real FFT-based multiplication is presented, as multiplication is a fundamental operation in fast multiple-precision arithmetic. The experimental results of multiple-precision floating-point addition, multiplication, division and square root operations on an Intel Xeon Phi 5110P are then reported.
引用
收藏
页码：60 / 70
页数：11
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