A Proposal of Vertical MOSFET and Electrothermal Analysis for Monolithic 3-D ICs

被引:2
|
作者
Zhu, Jia-He [1 ]
Wang, Da-Wei [1 ,2 ]
Zhao, Wen-Sheng [1 ]
Dai, Jia-Yun [3 ]
Wang, Gaofeng [1 ]
机构
[1] Hangzhou Dianzi Univ, MOE Engn Res Ctr Smart Microsensors & Microsyst, Sch Elect & Informat, Hangzhou 310018, Peoples R China
[2] State Key Lab Millimeter Waves, Nanjing 210096, Peoples R China
[3] Sci & Technol Monolith Integrated Circuits & Modu, Nanjing 210016, Peoples R China
基金
中国国家自然科学基金;
关键词
vertical MOSFET; through-oxide-via; silicon-on-insulator; electrothermal simulation; self-heating effect; EVOLUTION; STACKING; MODEL; BODY;
D O I
10.3390/electronics10182241
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, an innovative vertical MOSFET based on through-oxide via (TOV) technology is proposed for silicon-on-insulator (SOI)-based monolithic 3-D ICs. The proposed vertical MOSFET is investigated numerically. It was found that SOI can effectively reduce the parasitic capacitance, leakage current, power consumption, as well as suppress the pulse current interference of the substrate. The simulated results indicate that the proposed MOSFET possesses excellent characteristics in saturation current over 1500 mu A, sub-threshold swing of 69 mV/dec, and on/off current ratio of 1.28 x 10(11). Moreover, as temperature is a critical factor for the performance degradation of semiconductor devices, electrothermal simulations are conducted to predict the influence of the self-heating effect on device characteristics. The results show that device characteristics slightly deteriorate, but can still acceptable in their applications.
引用
收藏
页数:13
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