The all-digital loop

被引：0
|
作者：
Verpooten, L [1 ]
Vos, E [1 ]
机构：
[1] Alcatel, B-2018 Antwerp, Belgium
来源：
BROADBAND ACCESS AND NETWORK MANAGEMENT - NOC '98 | 1998年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
New trends in services, technology, networking, regulation and society seem to give reasons for a renaissance to the old idea of the "All-digital Loop". The paper will elaborate further on network architectures for the "All-digital Loop" while looking to particular aspects induced by these trends.
引用
收藏
页码：110 / 118
页数：9
相关论文
共 50 条
  • [21] All-Digital Automatic Gain Control Loop Based on Gain Decision
    Wang Yitao
    Shen Yuyao
    Yu Xiuli
    Wang Yongqing
    [J]. 2017 9TH INTERNATIONAL CONFERENCE ON ADVANCED INFOCOMM TECHNOLOGY (ICAIT 2017), 2017, : 63 - 67
  • [22] The Implementation of An Adaptive Bandwidth All-Digital Phase-Locked Loop
    Chen, Chen-Feng
    Chau, Yawgeng A.
    [J]. TENCON 2010: 2010 IEEE REGION 10 CONFERENCE, 2010, : 1182 - 1185
  • [23] Phase-domain all-digital phase-locked loop
    Staszewski, RB
    Balsara, PT
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2005, 52 (03) : 159 - 163
  • [24] A Multiphase All-Digital Delay-Locked Loop with Reuse SAR
    Chen, Pao-Lung
    Wang, Tzu-Siang
    Ciou, Jyun-Han
    [J]. PROCEEDINGS OF THE 2010 IEEE ASIA PACIFIC CONFERENCE ON CIRCUIT AND SYSTEM (APCCAS), 2010, : 939 - 942
  • [25] Direct Digital Synthesis-Based All-Digital Phase-Locked Loop
    Vezant, Benoit
    Mansuy, Cedric
    Bui, Hung Tien
    Boyer, Francois-Raymond
    [J]. 2009 JOINT IEEE NORTH-EAST WORKSHOP ON CIRCUITS AND SYSTEMS AND TAISA CONFERENCE, 2009, : 49 - +
  • [26] All-digital phase-locked loop for optical interconnect applications
    Hieu, Ngo Trong
    Lee, Tae-Woo
    Park, Hyo-Hoon
    [J]. 9TH INTERNATIONAL CONFERENCE ON ADVANCED COMMUNICATION TECHNOLOGY: TOWARD NETWORK INNOVATION BEYOND EVOLUTION, VOLS 1-3, 2007, : 1829 - +
  • [27] A Low-Jitter All-Digital Phase-Locked Loop Using a Suppressive Digital Loop Filter
    Hsu, Hsuan-Jung
    Huang, Shi-Yu
    [J]. 2009 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM, 2009, : 158 - 161
  • [28] The all-digital future and digital CiSE
    Thiruvathukal, George K.
    [J]. Computing in Science and Engineering, 2015, 17 (03): : 4 - 5
  • [29] The All-Digital Future and Digital CiSE
    Thiruvathukal, George K.
    [J]. COMPUTING IN SCIENCE & ENGINEERING, 2015, 17 (03) : 4 - 5
  • [30] A LOW POWER TIME-TO-DIGITAL CONVERTER FOR ALL-DIGITAL PHASE-LOCKED LOOP
    Yu Guangming Wang YuYang Huazhong (Department of Electronic Engineering
    [J]. Journal of Electronics(China), 2011, 28 (03) : 402 - 408
12345