共 50 条
- [1] Implementation of a semi-formal verification for embedded systems [J]. ICESS 2005: SECOND INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS, 2005, : 204 - 210
- [2] Semi-formal verification at IBM [J]. HLDVT'06: ELEVENTH ANNUAL IEEE INTERNATIONAL HIGH-LEVEL DESIGN VALIDATION AND TEST WORKSHOP, PROCEEDINGS, 2006, : 152 - 152
- [4] Semi-formal verification of VHDL-AMS descriptions [J]. 2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V, PROCEEDINGS, 2002, : 333 - 336
- [5] Semi-Formal and Formal Interface Specification for System of Systems Architecture [J]. 2013 7TH ANNUAL IEEE INTERNATIONAL SYSTEMS CONFERENCE (SYSCON 2013), 2013, : 612 - 619
- [7] Enhancing ESys.Net with a semi-formal verification layer [J]. 16TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, PROCEEDINGS, 2004, : 388 - 391
- [8] Management in distributed systems: A semi-formal approach [J]. EURO-PAR 2007 PARALLEL PROCESSING, PROCEEDINGS, 2007, 4641 : 651 - +
- [10] A Semi-Formal Approach for Analog Circuits Behavioral Properties Verification [J]. GLSVLSI'14: PROCEEDINGS OF THE 2014 GREAT LAKES SYMPOSIUM ON VLSI, 2014, : 247 - 248