Design for the testability of superconductor electronics

Advances in the electronics industry require ultra high-speed components nowadays. Superconductor electronics (SCE) is emerging as a technology for solutions in high-end applications in computing and communication. As the complexity of the system increases, testing becomes complex and, if not properly addressed, the system becomes non-testable, Hence, complex systems should be designed with testability in mind. The design-for-test structures should be able to detect the faults in the system under study. Controllability and observability are the key features for design for testability (DfT). A system-level study was carried out to verify the feasibility of DfT in SCE. In this paper, we illustrate at circuit level how this can be realized in SCE to monitor single-flux-quantum pulses. As a part of the research we have developed test structures to detect structural defects in SCE devices. We also present the details of the test results of those structures in this paper. This proves that we are able to detect possible random defects and provide defect statistics for a matured fabrication process.