Multiple fault diagnosis in analogue circuits using time domain response features and multilayer perceptrons

被引：9
|
作者：
Ogg, S
Lesage, S
Jervis, BW
Maidon, Y
Zimmer, T
机构：
[1] Sheffield Hallam Univ, Sch Engn, Sheffield S1 1WB, S Yorkshire, England
[2] Univ Bordeaux 1, Microelect Lab, IXL, F-33405 Talence, France
来源：
IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS | 1998年 / 145卷 / 04期
关键词：
integrated circuits; artificial neural networks; multilayer perceptrons; fault diagnosis;
D O I：
10.1049/ip-cds:19982119
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A technique is described for diagnosing multiple faults in analogue circuits from their impulse response function using multilayer perceptrons, in terms of a specific example. A Dirac impulse input to the circuit was simulated, and time domain features of the output response were classified by a system of two multilayer perceptrons to produce accurate numerical fault values.
引用
收藏
页码：213 / 218
页数：6
相关论文
共 50 条
  • [1] Diagnosis of multifaults in analogue circuits using multilayer perceptrons
    Maidon, Y
    Jervis, BW
    Dutton, N
    Lesage, S
    [J]. IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 1997, 144 (03): : 149 - 154
  • [2] Multiple fault diagnosis in analogue circuits
    Tadeusiewicz, M
    Halgas, S
    [J]. Proceedings of the 2005 European Conference on Circuit Theory and Design, Vol 3, 2005, : 205 - 208
  • [3] Time-domain fault diagnosis of analogue circuits in the presence of noise
    Brygilewicz, V
    Wojciechowski, J
    [J]. IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 1998, 145 (02): : 125 - 131
  • [4] Time-domain fault diagnosis of analogue circuits in the presence of noise
    Warsaw Univ of Technology, Warsaw, Poland
    [J]. IEE Proc Circuits Devices Syst, 2 (125-131):
  • [5] An algorithm for multiple fault diagnosis in analogue circuits
    Tadeusiewicz, M.
    Halgas, S.
    [J]. INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2006, 34 (06) : 607 - 615
  • [6] A method for multiple fault diagnosis in dynamic analogue circuits
    Tadeusiewicz, Michal
    Sidyk, Piotr
    Halgas, Stanislaw
    [J]. 2007 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1-3, 2007, : 834 - 837
  • [7] Multiple Soft Fault Diagnosis of Analogue Electronic Circuits
    Halgas, Stanislaw
    Tadeusiewicz, Michal
    [J]. ICSES 2008 INTERNATIONAL CONFERENCE ON SIGNALS AND ELECTRONIC SYSTEMS, CONFERENCE PROCEEDINGS, 2008, : 533 - 536
  • [8] The influence of global parametric faults on analogue electronic circuits time domain response features
    Jantos, P.
    Grzechca, D.
    Golonek, T.
    Rutkowski, J.
    [J]. 2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS, 2008, : 299 - 303
  • [9] A topological approach to fault diagnosis in analogue circuits
    Gao, X.C.
    Leach, D.P.
    Chan, S.P.
    [J]. 1600, (60):
  • [10] A functional testing of analogue electronic circuits with the use of specification approximation in the time-domain response features space
    Jantos, Piotr
    Golonek, Tomasz
    Rutkowski, Jerzy
    [J]. PRZEGLAD ELEKTROTECHNICZNY, 2011, 87 (10): : 110 - 113
12345