A sub-1V nanopower temperature-compensated sub-threshold CMOS voltage reference with 0.065%/V line sensitivity

被引：5

作者：

Magnelli, Luca ^{[1
]}

Crupi, Felice ^{[2
]}

Corsonello, Pasquale ^{[2
]}

Iannaccone, Giuseppe ^{[3
]}

机构：

[1] Danube Mobile Commun Engn GmbH & Co KG, Intel Mobile Commun, A-4040 Linz, Austria

[2] Univ Calabria, Dipartimento Ingn Informat Modellist Elettron & S, I-87036 Arcavacata Di Rende, Italy

[3] Univ Pisa, Dipartimento Ingn Informaz, I-56122 Pisa, Italy

来源：

INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS | 2015年 / 43卷 / 04期

关键词：

voltage reference; subthreshold CMOS; low voltage; low power; PPM/DEGREES-C;

D O I：

10.1002/cta.1950

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We present the design of a nanopower sub-threshold CMOS voltage reference and the measurements performed over a set of more than 70 samples fabricated in 0.18 mu m CMOS technology. The circuit provides a temperature-compensated reference voltage of 259 mV with an extremely low line sensitivity of only 0.065% at the price of a less effective temperature compensation. The voltage reference properly works with a supply voltage down to 0.6 V and with a power dissipation of only 22.3 nW. Very similar performance has been obtained with and without the inclusion of the start-up circuit. Copyright (c) 2013 John Wiley & Sons, Ltd.

引用

页码：421 / 426

页数：6

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