Design of a Low Power Approximate Adder based on Magnetic Tunnel Junction for Image Processing Applications

被引:0
|
作者
Monga, Kanika [1 ]
Chaturvedi, Nitin [1 ]
Gurunarayanan, S. [1 ]
机构
[1] Birla Inst Technol & Sci, Dept Elect & Elect Engn, Pilani, Rajasthan, India
关键词
D O I
10.1109/VLSI-TSA51926.2021.9440080
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
With the growth of big data applications such as voice/speech recognition, data mining, and computer vision, conventional computing system faces significant challenges. The increasing computational complexity and large data set results in large power consumption. To address this challenge, we propose to combine the benefits of approximate and in-memory computing which effectively reduces power consumption without any significant impact on the output. In this work, a low power approximate adder based on non-volatile memory element (Magnetic Tunnel Junction (MTJ)) is designed for a wide range of applications. Furthermore, the proposed approximate adder is demonstrated to perform edge detection on a 512x512 image using the Sobel Edge Detection Algorithm. The effect on the quality of image using metrics like mean square error (MSE), peak signal to noise ratio (PSNR), and structural similarity index (SSIM) are also investigated.
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页数:2
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