共 50 条
- [1] Low Power March Memory Test Algorithm for Static Random Access Memories [J]. INTERNATIONAL JOURNAL OF ENGINEERING, 2018, 31 (02): : 292 - 298
- [2] Minimal march test algorithm for detection of linked static faults in random access memories [J]. 24TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2006, : 120 - +
- [5] A March-based fault location algorithm for Static random access memories [J]. PROCEEDING OF THE 2002 IEEE INTERNATIONAL WORKSHOP ON MEMORY TECHNOLOGY, DESIGN AND TESTING, 2002, : 62 - 67
- [6] A March-based fault location algorithm for Static Random Access Memories [J]. PROCEEDINGS OF THE EIGHTH IEEE INTERNATIONAL ON-LINE TESTING WORKSHOP, 2002, : 256 - 261
- [8] A parallel test algorithm for pattern sensitive faults in semiconductor random access memories [J]. ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE, 1997, : 2721 - 2724
- [9] SOURCE LIST - STATIC RANDOM-ACCESS MEMORIES [J]. ELECTRONIC PRODUCTS MAGAZINE, 1988, 30 (16): : 40 - 41
- [10] Si/SiGe Tunnelling Static Random Access Memories [J]. SIGE, GE, AND RELATED COMPOUNDS 5: MATERIALS, PROCESSING, AND DEVICES, 2012, 50 (09): : 987 - 990