Design and Simulation of Digital Frequency Meter using VHDL

被引：0

作者：

Pardhu, Thottempudi ^{[1
]}

Harshitha, Sunkara ^{[1
]}

机构：

[1] Marri Laxman Reddy Inst Technol & Management, Dept ECE, Hyderabad, Andhra Pradesh, India

来源：

2014 INTERNATIONAL CONFERENCE ON COMMUNICATIONS AND SIGNAL PROCESSING (ICCSP) | 2014年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The main aim of this paper is to design the digital frequency meter with frequency analyzing module. As a measuring frequency's instrument, the cymometer often refer to as electronic counter in modern electronic technology. Its basic function is to measure the signal frequency and this frequency counter has a wide range of applications. It is not only used in the general simple instrument's measurement, but also used in teaching, research, high-precision instruments measuring, industrial control and other areas. Currently, the high-performance and simplestructure electronic products have become the mainstay of market. In this project the cymometer not only measure the frequency but also determines the jitter, glitches status etc., Digital Frequency Meter were designed using VHDL language and simulated using Modelsim 6.3v simulator. In order to increase the efficiency of the system, sleep mode concept is introduced, which reduces unwanted circuit power utilization.

引用

页数：5

共 50 条

[31] Digital mass flow rate meter design based on frequency division and multiplication
Kadhim, K.N.
Abdul-Karim, M.A.H.
Modelling, Simulation & Control B: Mechanical & Thermal Engineering, Materials & Resources, Chemistry, 1990, 31 (01): : 23 - 31
[32] Reed-Solomon Digital encoder and decoder design using VHDL programming
Sandoval, C.
Fedon, A.
NEXO REVISTA CIENTIFICA, 2008, 21 (01): : 2 - 10
[33] Digital code lock design using VHDL with top-down method
Zhou, Yuan
Yang, Li-hua
Beijing Huagong Daxue Xuebao(Ziran Kexueban)/Journal of Beijing University of Chemical Technology, 2000, 27 (02): : 97 - 99
[34] VHDL behavioral ATPG and fault simulation of digital systems
Chen, CIH
Noh, TH
IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS, 1998, 34 (02) : 428 - 447
[35] Logic design using VHDL
Moussavi, Massoud
Proceedings - Frontiers in Education Conference, 1999, 3 : 4 - 22
[36] Design and simulation of VHDL based ARP cache
Tian-Hua, Liu
Hong-Feng, Zhu
Chuan-Sheng, Zhou
Gui-Ran, Chang
2007 THIRD INTERNATIONAL CONFERENCE ON INTELLIGENT INFORMATION HIDING AND MULTIMEDIA SIGNAL PROCESSING, VOL II, PROCEEDINGS, 2007, : 373 - 376
[37] Using VHDL for board level simulation
Habinc, S
Sinander, P
IEEE DESIGN & TEST OF COMPUTERS, 1996, 13 (03): : 66 - 78
[38] Using VHDL for board level simulation
European Space Agency
IEEE Des Test Comput, 3 (66-78):
[39] Optical link simulation using VHDL
Koh, S
Ye, L
PROCEEDINGS OF THE IEEE SOUTHEASTCON '96: BRINGING TOGETHER EDUCATION, SCIENCE AND TECHNOLOGY, 1996, : 187 - 190
[40] Simulation of the 16550 UART using VHDL
Vakilzadian, H
Siew, A
PROCEEDINGS OF THE 1998 SUMMER COMPUTER SIMULATION CONFERENCE: SIMULATION AND MODELING TECHNOLOGY FOR THE TWENTY-FIRST CENTURY, 1998, : 684 - 688

← 1 2 3 4 5 →