Efficient Built-In Self-Test algorithm for memory

被引：2

作者：

Wang, SJ ^{[1
]}

Wei, CJ ^{[1
]}

机构：

[1] Natl Chung Hsing Univ, Inst Comp Sci, Taichung 402, Taiwan

来源：

PROCEEDINGS OF THE NINTH ASIAN TEST SYMPOSIUM (ATS 2000) | 2000年

关键词：

D O I：

10.1109/ATS.2000.893604

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We present a new pseudorandom testing algorithm for the Built-In Self-Test (BIST) of DRAM. In this algorithm, test patterns are complemented to generate state-transitions that are needed fur the detection of coulping faults. As a result, the number of test patterns required is less than half of the traditional method, while the extra hardware is negligible.

引用

页码：66 / 70

页数：5

共 50 条

[1] Built-in self-test
Zorian, Y
[J]. MICROELECTRONIC ENGINEERING, 1999, 49 (1-2) : 135 - 138
[2] BUILT-IN SELF-TEST DESIGN OF SEMICONDUCTOR MEMORY
RAJASHEKHARA, TN
[J]. INTERNATIONAL JOURNAL OF ELECTRONICS, 1991, 70 (03) : 645 - 649
[3] Quality Assurance in Memory Built-In Self-Test Tools
Au, Albert
Pogiel, Artur
Rajski, Janusz
Sydow, Piotr
Tyszer, Jerzy
Zawada, Justyna
[J]. PROCEEDINGS OF THE 2014 IEEE 17TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS), 2014, : 39 - 44
[4] Architecture of Built-In Self-Test and Recovery Memory Chips
Landrienko, V. A.
Diaa, Moamar
Ryabtsev, V. G.
Lutkina, T. Yu
[J]. PROCEEDINGS OF IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS 2013), 2013,
[5] Built-in self-test for flash memory embedded in SoC
Banerjee, S
Chowdhury, DR
[J]. DELTA 2006: THIRD IEEE INTERNATIONAL WORKSHOP ON ELECTRONIC DESIGN, TEST AND APPLICATIONS, 2006, : 379 - +
[6] A Programmable Built-in Self-Test for Embedded Memory Cores
Banerjee, Shibaji
Chowdhury, Dipanwita Roy
Bhattacharya, Bhargab B.
[J]. IETE TECHNICAL REVIEW, 2007, 24 (07) : 287 - 311
[7] Efficient built-in self-test techniques for memory-based FFT processors
Lu, SK
Yeh, CH
Lin, HW
[J]. 10TH IEEE PACIFIC RIM INTERNATIONAL SYMPOSIUM ON DEPENDABLE COMPUTING, PROCEEDINGS, 2004, : 321 - 326
[8] A Programmable Built-in Self-Test for Embedded Memory Cores
Banerjee, Shibaji
Chowdhury, Dipanwita Roy
Bhattacharya, Bhargab B.
[J]. IETE TECHNICAL REVIEW, 2007, 24 (04) : 287 - 311
[9] On Built-In Self-Test for Adders
Pulukuri, Mary D.
Stroud, Charles E.
[J]. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2009, 25 (06): : 343 - 346
[10] BUILT-IN SELF-TEST STRUCTURES
MCCLUSKEY, EJ
[J]. IEEE DESIGN & TEST OF COMPUTERS, 1985, 2 (02): : 29 - 36

← 1 2 3 4 5 →