power modeling and estimation;
sampling method;
VLSI;
D O I:
10.1109/43.703828
中图分类号:
TP3 [计算技术、计算机技术];
学科分类号:
0812 ;
摘要:
In this paper, we present new statistical sampling techniques for performing power estimation at the circuit level. These techniques first transform the power estimation problem to a survey sampling problem, and then apply stratified random sampling to improve the efficiency of sampling, The stratification is based on a low-cost predictor, such as the zero delay power estimate, We also propose a two-stage stratified sampling technique to handle very long initial sequences. Experimental results show that the efficiency of stratified random sampling and two-stage stratified sampling techniques are 3-10 times higher than that of simple random sampling and the Markov-based Monte Carlo simulation techniques.