共 50 条
- [41] A FPGA-based Hardware Accelerator for Multiple Convolutional Neural Networks [J]. 2018 14TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2018, : 1075 - 1077
- [42] Development of FPGA Toolbox for Implementation of Spiking Neural Networks [J]. 2015 FIFTH INTERNATIONAL CONFERENCE ON COMMUNICATION SYSTEMS AND NETWORK TECHNOLOGIES (CSNT2015), 2015, : 806 - 810
- [43] Resource and Data Optimization for Hardware Implementation of Deep Neural Networks Targeting FPGA-based Edge Devices [J]. 2018 ACM/IEEE INTERNATIONAL WORKSHOP ON SYSTEM LEVEL INTERCONNECT PREDICTION (SLIP), 2018,
- [45] Implementation of a neural classifier on a FPGA-based reconfigurable system of cardiac arrhythmias [J]. Baba Hamed, Amel (amel.baba1@yahoo.fr), 1600, Editura ELECTRA (64):
- [46] An Energy-Efficient FPGA-based Convolutional Neural Network Implementation [J]. 29TH IEEE CONFERENCE ON SIGNAL PROCESSING AND COMMUNICATIONS APPLICATIONS (SIU 2021), 2021,
- [48] A Hybrid Architecture for Efficient FPGA-based Implementation of Multilayer Neural Network [J]. PROCEEDINGS OF THE 2010 IEEE ASIA PACIFIC CONFERENCE ON CIRCUIT AND SYSTEM (APCCAS), 2010, : 616 - 619
- [50] A FPGA-based implementation of JPEG encoder [J]. 2016 SECOND INTERNATIONAL IMAGE PROCESSING, APPLICATIONS AND SYSTEMS (IPAS), 2016,