共 50 条
- [21] Tail Biting Convolutional Code Decoder Co-processor for High Throughput System-on-Chip 2015 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2015, : 303 - 304
- [22] Early experience on porting and running a Lattice Boltzmann code on the Xeon-Phi co-processor 2013 INTERNATIONAL CONFERENCE ON COMPUTATIONAL SCIENCE, 2013, 18 : 551 - 560
- [24] Towards optimized tensor code generation for deep learning on sunway many-core processor Frontiers of Computer Science, 2024, 18
- [25] Practical compiler techniques on efficient multithreaded code generation for OpenMP programs COMPUTER JOURNAL, 2005, 48 (05): : 588 - 601
- [26] Efficient and flexible co-processor for server-based public key cryptography applications Lecture Notes in Electrical Engineering, 2010, 78 : 129 - 149
- [29] Compiler-Based Graph Representations for Deep Learning Models of Code PROCEEDINGS OF THE 29TH INTERNATIONAL CONFERENCE ON COMPILER CONSTRUCTION (CC '20), 2020, : 201 - 211
- [30] Reconfigurable Co-Processor Architecture with Limited Numerical Precision to Accelerate Deep Convolutional Neural Networks 2018 IEEE 29TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP), 2018, : 143 - 149