Design for verification?

被引：0

作者：

Austin, T ^{[1
]}

机构：

[1] Univ Michigan, Ann Arbor, MI 48109 USA

来源：

IEEE DESIGN & TEST OF COMPUTERS | 2001年 / 18卷 / 04期

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：80 / +

页数：2

共 50 条

[1] Design for verification?
Austin, T.
[J]. IEEE Design and Test of Computers, 2001, 18 (04):
[2] Design for Verification
Francis, Andrew
Maropoulos, Paul
Mullineux, Glen
Keogh, Patrick
[J]. 9TH INTERNATIONAL CONFERENCE ON DIGITAL ENTERPRISE TECHNOLOGY - INTELLIGENT MANUFACTURING IN THE KNOWLEDGE ECONOMY ERA, 2016, 56 : 61 - 66
[3] NoCs design for verification
Hahanov, V.
Yegorov, O.
Mostova, K.
[J]. ELEKTRONIKA IR ELEKTROTECHNIKA, 2007, (03) : 45 - 48
[4] FSM design and verification
Stuart, M
[J]. ELECTRONIC ENGINEERING, 1999, 71 (866): : 17 - +
[5] Introducing Design for Verification
Cajal, C.
Santolaria, J.
Acero, R.
Pueo, M.
[J]. MESIC MANUFACTURING ENGINEERING SOCIETY INTERNATIONAL CONFERENCE 2015, 2015, 132 : 772 - 779
[6] Design for verification with SystemVerilog
Moorby, P
[J]. 17TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: DESIGN METHODOLOGIES FOR THE GIGASCALE ERA, 2004, : 378 - 378
[7] FSM design and verification
Stuart, Michael
[J]. Electronic Engineering (London), 1999, 71 (866): : 17 - 19
[8] MEMS design and verification
Mukherjee, T
[J]. INTERNATIONAL TEST CONFERENCE 2003, PROCEEDINGS, 2003, : 681 - 690
[9] Geometric verification of design
Faraj, Ihsan
[J]. Engineering, Construction and Architectural Management, 2003, 10 (01) : 56 - 70
[10] A "Design for verification" methodology
Sforza, F
Battù, L
Brunelli, M
Castelnuovo, A
Magnaghi, M
[J]. INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, PROCEEDINGS, 2001, : 50 - 55