Energy-Efficient Architecture for CNNs Inference on Heterogeneous FPGA

被引:14
|
作者
Spagnolo, Fanny [1 ]
Perri, Stefania [2 ]
Frustaci, Fabio [1 ]
Corsonello, Pasquale [1 ]
机构
[1] Univ Calabria, Dept Informat Modeling Elect & Syst Engn, I-87036 Arcavacata Di Rende, Italy
[2] Univ Calabria, Dept Mech Energy & Management Engn, I-87036 Arcavacata Di Rende, Italy
关键词
convolutional neural networks; heterogeneous FPGAs; embedded systems; DEEP NEURAL-NETWORKS; ACCELERATOR;
D O I
10.3390/jlpea10010001
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Due to the huge requirements in terms of both computational and memory capabilities, implementing energy-efficient and high-performance Convolutional Neural Networks (CNNs) by exploiting embedded systems still represents a major challenge for hardware designers. This paper presents the complete design of a heterogeneous embedded system realized by using a Field-Programmable Gate Array Systems-on-Chip (SoC) and suitable to accelerate the inference of Convolutional Neural Networks in power-constrained environments, such as those related to IoT applications. The proposed architecture is validated through its exploitation in large-scale CNNs on low-cost devices. The prototype realized on a Zynq XC7Z045 device achieves a power efficiency up to 135 Gops/W. When the VGG-16 model is inferred, a frame rate up to 11.8 fps is reached.
引用
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页数:17
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