Energy-Efficient Embedded Inference of SVMs on FPGA

We propose an energy-efficient embedded binarized support vector machine (eBSVM) architecture and present its implementation on a low-power FPGA accelerator. With binarized input activations and output weights, the dot product operation (floating point multiplications and additions) can be replaced by bitwise XNOR and popcount operations, respectively. The proposed accelerator computes the two binarized vectors using Hamming weights, which reduces the execution time and energy consumption. The evaluation results show that eBSVM demonstrates a performance and performance-per-Watt on the MNIST and CIFAR-10 datasets comparable to that of its fixed point (FP) counterpart implemented in the CPU and GPU with a small accuracy degradation.