共 50 条
- [12] Parameter Optimization of High-Speed CMOS Operational Amplifiers Based on Dual-Input Stage [J]. 2017 IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS), 2017,
- [14] Energy-Efficient High-Speed CMOS Pipelined Multiplier [J]. 2008 5TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING, COMPUTING SCIENCE AND AUTOMATIC CONTROL (CCE 2008), 2008, : 319 - 323
- [15] A 1-V 1-mW high-speed class AB operational amplifier for high-speed low power pipelined A/D converters using "slew boost" technique [J]. ISLPED'03: PROCEEDINGS OF THE 2003 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, 2003, : 340 - 344
- [16] Selecting high-speed A/D converters [J]. ELECTRONIC PRODUCTS MAGAZINE, 1999, 42 (06): : 69 - 72
- [17] Design features of high-speed CMOS differential difference operational amplifiers at low static current consumption [J]. 2018 26TH TELECOMMUNICATIONS FORUM (TELFOR), 2018, : 543 - 546
- [20] Very High-Speed CMOS Comparators for multi-GS/s A/D Converters [J]. 2015 11TH CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME), 2015, : 240 - 243