The phase fluctuations of the clock signal generated in the digital frequency synthesis process

被引：0

作者：

Frankowski, Robert ^{[1
]}

Kowalski, Marcin ^{[1
]}

Zielinski, Marek ^{[1
]}

机构：

[1] Uniwersytet Mikolaja Kopernika Toruniu, Wydzial Fizyki Astron & Informat Stosowanej, Inst Fizyki, PL-87100 Torun, Poland

来源：

PRZEGLAD ELEKTROTECHNICZNY | 2011年 / 87卷 / 9A期

关键词：

phase fluctuations; digital frequency synthesis; programmable devices;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The article presents, the results of the phase fluctuation measurements of the clock signal generated in the digital frequency synthesis process. For this purpose, dedicated DCM blocks embedded in the field programmable gate array Virtex4 XC4VFX12 structure are used. Measurements allowed to choose the appropriate mode of operation of these units to get the reference clock signal characterized by the smallest random error. (The phase fluctuations of the clock signal generated in the digital frequency synthesis process).

引用

页码：95 / 100

页数：6

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