SPICE-compatible modelling technique for simulating floating-gate transistors

被引：8
|
作者：
Rapp, S. J. [1 ]
McMillan, K. R. [1 ]
Graham, D. W. [1 ]
机构：
[1] W Virginia Univ, Lane Dept Comp Sci & Elect Engn, Morgantown, WV 26506 USA
来源：
ELECTRONICS LETTERS | 2011年 / 47卷 / 08期
关键词：
D O I：
10.1049/el.2011.0458
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A technique is introduced to enable the simulation of floating-gate transistors within standard analogue circuit simulators, such as SPICE. This technique can be used in all types of circuit simulations, ranging from DC sweeps to charge-modification scenarios. The technique is then used to simulate several analogue circuits, the results of which show strong agreement with identical circuits fabricated in standard CMOS processes.
引用
收藏
页码：483 / 485
页数：3
相关论文
共 50 条
  • [1] SPICE-compatible physical model of nanocrystal floating gate devices for circuit simulation
    Schinke, D.
    Priyadarshi, S.
    Pitts, W. Shepherd
    Di Spigna, N.
    Franzon, P.
    [J]. IET CIRCUITS DEVICES & SYSTEMS, 2011, 5 (06) : 477 - 483
  • [2] Indirect programming of floating-gate transistors
    Graham, David W.
    Farquhar, Ethan
    Degnan, Brian
    Gordon, Christal
    Hasler, Paul
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2007, 54 (05) : 951 - 963
  • [3] Indirect programming of floating-gate transistors
    Graham, DW
    Farquhar, E
    Degnan, B
    Gordon, C
    Hasler, P
    [J]. 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 2172 - 2175
  • [4] SPICE-Compatible Compact Model for Graphene Field-Effect Transistors
    Henry, Michael B.
    Das, Shamik
    [J]. 2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012), 2012, : 2521 - 2524
  • [5] A Methodology for the Accurate SPICE-compatible Modelling of MSM Photodetectors for Nanophotonic Interconnects
    Qodratnama, Arash
    Khunjush, Farshad
    Raji, Mohsen
    [J]. 2019 27TH IRANIAN CONFERENCE ON ELECTRICAL ENGINEERING (ICEE 2019), 2019, : 130 - 134
  • [6] High performance floating-gate technology compatible antifuse
    Xie, Xiaodong
    Li, Wei
    Li, Jianjun
    Wang, Gang
    [J]. ELECTRONICS LETTERS, 2013, 49 (12) : 763 - +
  • [7] A Regulated Charge Pump for Injecting Floating-Gate Transistors
    Navidi, Mir Mohammad
    Graham, David W.
    [J]. 2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2017, : 2270 - 2273
  • [8] A novel serial multiplier using floating-gate transistors
    Sinencio, LFC
    Sanchez, AD
    Angulo, JR
    [J]. 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, 2004, : 861 - 864
  • [9] IV CHARACTERISTICS OF FLOATING-GATE MOS-TRANSISTORS
    WANG, ST
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1979, 26 (09) : 1292 - 1294
  • [10] A simulation model for floating-gate MOS synapse transistors
    Rahimi, K
    Diorio, C
    Hernandez, C
    Brockhausen, MD
    [J]. 2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, PROCEEDINGS, 2002, : 532 - 535
12345