Mayo: A Framework for Auto-generating Hardware Friendly Deep Neural Networks

被引:7
|
作者
Zhao, Yiren [1 ]
Gao, Xitong [2 ]
Mullins, Robert [1 ]
Xu, Chengzhong [2 ]
机构
[1] Univ Cambridge, Cambridge, England
[2] Chinese Acad Sci, Shenzhen Inst Adv Technol, Shenzhen, Peoples R China
基金
英国工程与自然科学研究理事会; 中国国家自然科学基金;
关键词
Deep Neural Network; Pruning; Qantization; Automated Hyperparameter Optimization;
D O I
10.1145/3212725.3212726
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Deep Neural Networks (DNNs) have proved to be a convenient and powerful tool for a wide range of problems. However, the extensive computational and memory resource requirements hinder the adoption of DNNs in resource-constrained scenarios. Existing compression methods have been shown to significantly reduce the computation and memory requirements of many popular DNNs. These methods, however, remain elusive to non-experts, as they demand extensive manual tuning of hyperparameters. The effects of combining various compression techniques lack exploration because of the large design space. To alleviate these challenges, this paper proposes an automated framework, Mayo, which is built on top of TensorFlow and can compress DNNs with minimal human intervention. First, we present overriders which are recursively-compositional and can be configured to effectively compress individual components (e.g. weights, biases, layer computations and gradients) in a DNN. Second, we introduce novel heuristics and a global search algorithm to effciently optimize hyperparameters. We demonstrate that without any manual tuning, Mayo generates a sparse ResNet-18 that is 5.13x smaller than the baseline with no loss in test accuracy. By composing multiple overriders, our tool produces a sparse 6-bit CIFAR-10 classifier with only 0.16% top-1 accuracy loss and a 34x compression rate. Mayo and all compressed models are publicly available. To our knowledge, Mayo is the first framework that supports overlapping multiple compression techniques and automatically optimizes hyperparameters in them.
引用
收藏
页码:25 / 30
页数:6
相关论文
共 50 条
  • [21] Development of hardware neural networks generating driving waveform for electrostatic actuator
    Takuro Sasaki
    Mika Kurosawa
    Masaya Ohara
    Yuichiro Hayakawa
    Daisuke Noguchi
    Yuki Takei
    Minami Kaneko
    Fumio Uchikoba
    Ken Saito
    Artificial Life and Robotics, 2020, 25 : 446 - 452
  • [22] Development of hardware neural networks generating driving waveform for electrostatic actuator
    Sasaki, Takuro
    Kurosawa, Mika
    Ohara, Masaya
    Hayakawa, Yuichiro
    Noguchi, Daisuke
    Takei, Yuki
    Kaneko, Minami
    Uchikoba, Fumio
    Saito, Ken
    ARTIFICIAL LIFE AND ROBOTICS, 2020, 25 (03) : 446 - 452
  • [23] Deep Neural Network Acceleration Framework Under Hardware Uncertainty
    Imani, Mohsen
    Wang, Pushen
    Rosing, Tajana
    2018 19TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 2018, : 389 - 394
  • [24] GNNerator: A Hardware/Software Framework for Accelerating Graph Neural Networks
    Stevens, Jacob R.
    Das, Dipankar
    Avancha, Sasikanth
    Kaul, Bharat
    Raghunathan, Anand
    2021 58TH ACM/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2021, : 955 - 960
  • [25] A manufacture-friendly design framework for optical neural networks
    Zhao, Yang
    Tian, Ye
    Liu, Shengping
    Wang, Wei
    Li, Qiang
    Feng, Junbo
    Guo, Jin
    Han, Jianzhong
    AOPC 2020: DISPLAY TECHNOLOGY; PHOTONIC MEMS, THZ MEMS, AND METAMATERIALS; AND AI IN OPTICS AND PHOTONICS, 2020, 11565
  • [26] A Unified Framework of Deep Neural Networks by Capsules
    Li, Yujian
    Shan, Chuanhui
    COGNITIVE SYSTEMS AND SIGNAL PROCESSING, PT II, 2019, 1006 : 231 - 242
  • [27] Hardware-Friendly Stochastic and Adaptive Learning in Memristor Convolutional Neural Networks
    Zhang, Wei
    Pan, Lunshuai
    Yan, Xuelong
    Zhao, Guangchao
    Chen, Hong
    Wang, Xingli
    Tay, Beng Kang
    Zhong, Gaokuo
    Li, Jiangyu
    Huang, Mingqiang
    ADVANCED INTELLIGENT SYSTEMS, 2021, 3 (09)
  • [28] An analytical approach to hardware-friendly adaptive learning rate neural networks
    Rezaie, MG
    Farbiz, F
    Fakhraie, SM
    16TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, PROCEEDINGS, 2004, : 320 - 323
  • [29] Hardware Accelerator for Adversarial Attacks on Deep Learning Neural Networks
    Guo, Haoqiang
    Peng, Lu
    Zhang, Jian
    Qi, Fang
    Duan, Lide
    2019 TENTH INTERNATIONAL GREEN AND SUSTAINABLE COMPUTING CONFERENCE (IGSC), 2019,
  • [30] SafeTPU: A Verifiably Secure Hardware Accelerator for Deep Neural Networks
    Mera Collantes, Maria I.
    Ghodsi, Zahra
    Garg, Siddharth
    Proceedings of the IEEE VLSI Test Symposium, 2020, 2020-April