共 50 条
- [1] Low-power reference buffer for Successive Approximation Register Analog-to-Digital converters [J]. 2018 INTERNATIONAL CONFERENCE ON IC DESIGN AND TECHNOLOGY (ICICDT 2018), 2018, : 45 - 48
- [2] Digitally Assisted Low-Power Pipelined Analog-to-Digital Converters [J]. PROCEEDINGS OF THE 2015 IEEE NORTH WEST RUSSIA SECTION YOUNG RESEARCHERS IN ELECTRICAL AND ELECTRONIC ENGINEERING CONFERENCE (2015 ELCONRUSNW), 2015, : 254 - 256
- [3] Capacitor Scaling for Low-Power Design of Cyclic Analog-to-Digital Converters [J]. 2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, 2010, : 1456 - 1459
- [4] Low-power implementation of a Comb decimation filter for ΔΣ analog-to-digital converters [J]. 2006 8TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING, VOLS 1-4, 2006, : 626 - 629
- [5] Low-Power Bootstrapped Sample and Hold Circuit for Analog-to-Digital Converters [J]. 2016 IEEE 59TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2016, : 349 - 352
- [6] Trends in the Design of High-speed, Low-power Analog-to-Digital Converters [J]. 2015 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT), 2015, : 169 - 171
- [9] A low-power design methodology for high-resolution pipelined analog-to-digital converters [J]. ISLPED'03: PROCEEDINGS OF THE 2003 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, 2003, : 334 - 339
- [10] A low-power variable resolution analog-to-digital converter [J]. 14TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGS, 2001, : 460 - 463