Performance analysis of four parallel programming models on NUMA architectures

Efficient parallel implementation of the NAS NPB benchmark is a challenging task. In this paper, We compare the performance of and the programming effort required for coding the NAS NPB benchmark under four leading parallel programming models: MPI, OpenMP, SHMEM, and DSM on an SGI NUMA Origin 3800 system, a machine which supports all four models efficiently. We make use of the spectrum of performance analysis and profiler tools within the SGI NUMA environment to monitor various low-level physical parameters to analyze the efficiency and performance of each of the programming models. Our objective is to be able to compare the physically monitored parameters across the four programming models. Using this visualized information, we will be able to better understand the communication, data/threads layouts, and I/O bottlenecks in these parallel programming models. Results indicate that the four models deliver comparable performance; however, the implementations differ significantly beyond merely using explicit messages versus implicit loads/stores even though the basic parallel algorithms are similar. Compared with the message-passing (using MPI) and SHMEM programming models, the cache-coherent distributed shared address space DSM-UPC and shared OpenMP models provide substantial ease of programming at both the conceptual and program orchestration levels, often accompanied by performance gains. However, DSM-UPC currently has portability limitations and may suffer from poor spatial locality of physically distributed shared data on large numbers of processors.