Parallel Programming Tools for Multi-core Architectures

被引：0
|
作者：
Mohr, Bernd [1 ]
Krammer, Bettina [2 ]
Mix, Hartmut [3 ]
机构：
[1] Forschungszentrum Julich, JSC, D-52425 Julich, Germany
[2] Univ Versailles St Quentin En Yvelines UVSQ, Versailles, France
[3] Tech Univ Dresden, Ctr Informat Serv & High Performance Comp ZIH, Dresden, Germany
来源：
PARALLEL COMPUTING: FROM MULTICORES AND GPU'S TO PETASCALE | 2010年 / 19卷
关键词：
D O I：
10.3233/978-1-60750-530-3-643
中图分类号：
TP31 [计算机软件];
学科分类号：
081202 ; 0835 ;
摘要：
引用
收藏
页码：643 / 652
页数：10
相关论文
共 50 条
  • [1] Comparative analysis of debugging tools in parallel programming for multi-core processors
    Shipunov, Valeriy
    Gavryushenko, Andrey
    Kuznetsov, Eugene
    [J]. 2007 PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE ON THE EXPERIENCE OF DESIGNING AND APPLICATION OF CAD SYSTEMS IN MICROELECTRONICS, 2007, : 426 - 428
  • [2] A WCET-Aware Parallel Programming Model for Predictability Enhanced Multi-core Architectures
    Reder, Simon
    Mesing, Leonard
    Bucher, Harald
    ter Braak, Timon
    Stripf, Timo
    Becker, Juergen
    [J]. PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2018, : 943 - 948
  • [3] OnipSs: A PROPOSAL FOR PROGRAMMING HETEROGENEOUS MULTI-CORE ARCHITECTURES
    Duran, Alejandro
    Ayguade, Eduard
    Badia, Rosa M.
    Labahta, Jesus
    Martinell, Luis
    Martorell, Xavier
    Planas, Judit
    [J]. PARALLEL PROCESSING LETTERS, 2011, 21 (02) : 173 - 193
  • [4] A Hybrid Parallel Tridiagonal Solver on Multi-core Architectures
    Tang, Guangping
    Li, Kenli
    Li, Keqin
    Chen, Hang
    Du, Jiayi
    [J]. PROCEEDINGS OF 2014 IEEE INTERNATIONAL PARALLEL & DISTRIBUTED PROCESSING SYMPOSIUM WORKSHOPS (IPDPSW), 2014, : 605 - 614
  • [5] Automated Tuning in Parallel Sorting on Multi-core Architectures
    Lin, Haibo
    Li, Chao
    Wang, Qian
    Zhao, Yi
    Pan, Ninghe
    Zhuang, Xiaotong
    Shao, Ling
    [J]. EURO-PAR 2010 PARALLEL PROCESSING, PT I, 2010, 6271 : 14 - +
  • [6] MODELS FOR PARALLEL WORKFLOW PROCESSING ON MULTI-CORE ARCHITECTURES
    Rauber, Thomas
    Ruenger, Gudula
    [J]. ICEIS 2008: PROCEEDINGS OF THE TENTH INTERNATIONAL CONFERENCE ON ENTERPRISE INFORMATION SYSTEMS, VOL ISAS-2: INFORMATION SYSTEMS ANALYSIS AND SPECIFICATION, VOL 2, 2008, : 220 - +
  • [7] A parallel algorithm for coverage optimization on multi-core architectures
    Wei, Ran
    Murray, Alan T.
    [J]. INTERNATIONAL JOURNAL OF GEOGRAPHICAL INFORMATION SCIENCE, 2016, 30 (03) : 432 - 450
  • [8] Abstraction of Programming Models Across Multi-Core and GPGPU Architectures
    Beach, Thomas H.
    Grimstead, Ian J.
    Walker, David W.
    Avis, Nick J.
    [J]. PARALLEL COMPUTING: FROM MULTICORES AND GPU'S TO PETASCALE, 2010, 19 : 554 - 561
  • [9] A Parallel Dynamic Programming Algorithm on a Multi-core Architecture
    Tan, Guangming
    Sun, Ninghui
    Gao, Guang R.
    [J]. SPAA'07: PROCEEDINGS OF THE NINETEENTH ANNUAL SYMPOSIUM ON PARALLELISM IN ALGORITHMS AND ARCHITECTURES, 2007, : 135 - +
  • [10] PARALLEL FPGA TECHNOLOGY MAPPING USING MULTI-CORE ARCHITECTURES
    Kennings, Andrew
    Ravishankar, Chirag
    [J]. 2011 24TH CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (CCECE), 2011, : 274 - 279
12345