VLSI architecture for stack filters

A new approach to implementation of stack filtering has been suggested in the previous work [8]. Based on this approach, efficient algorithms and a new VLSI architecture are developed. They are fast and programmable, thus supporting adaptive stack filtering in real time. An arbitrary stack filter (i.e., filter based on any PBF) of given window size M is realizable on this architecture in constant time. The architecture is simple without long connections or feedback loops. In this work a new VLSI implementation of order statistic filtering is proposed. Simulations verify the high-speed functionality of the device.