共 50 条
- [1] Power-Aware Variable Partitioning for DSPs with Hybrid PRAM and DRAM Main Memory [J]. PROCEEDINGS OF THE 48TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2011, : 405 - 410
- [3] Energy-Efficient Hybrid DRAM/NVM Main Memory [J]. 2015 INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURE AND COMPILATION (PACT), 2015, : 492 - 493
- [4] PDRAM: A Hybrid PRAM and DRAM Main Memory System [J]. DAC: 2009 46TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2, 2009, : 664 - 669
- [5] TriBHMM: An Energy-Efficient and Latency-Aware Hybrid Main Memory [J]. 2019 IEEE INTL CONF ON PARALLEL & DISTRIBUTED PROCESSING WITH APPLICATIONS, BIG DATA & CLOUD COMPUTING, SUSTAINABLE COMPUTING & COMMUNICATIONS, SOCIAL COMPUTING & NETWORKING (ISPA/BDCLOUD/SOCIALCOM/SUSTAINCOM 2019), 2019, : 1451 - 1456
- [6] Power Management of Hybrid DRAM/PRAM-Based Main Memory [J]. PROCEEDINGS OF THE 48TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2011, : 59 - 64
- [8] An Energy- and Performance-Aware DRAM Cache Architecture for Hybrid DRAM/PCM Main Memory Systems [J]. 2011 IEEE 29TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 2011, : 381 - 387
- [9] DH-LRU: Dynamic Hybrid LRU Caching Scheme for PRAM/DRAM Hybrid Main Memory [J]. INTERNATIONAL JOURNAL OF GRID AND DISTRIBUTED COMPUTING, 2016, 9 (11): : 81 - 94
- [10] NEMO: An Energy-Efficient Hybrid Main Memory System for Mobile Devices [J]. MEMSYS 2017: PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON MEMORY SYSTEMS, 2017, : 351 - 362