Low-temperature and scalable CVD route to WS2 monolayers on SiO2/Si substrates

被引:14
|
作者
Cadot, Stephane [1 ,2 ,3 ]
Renault, Olivier [1 ,2 ]
Rouchon, Denis [1 ,2 ]
Mariolle, Denis [1 ,2 ]
Nolot, Emmanuel [1 ,2 ]
Thieuleux, Chloe [3 ]
Veyre, Laurent [3 ]
Okuno, Hanako [2 ,4 ]
Martin, Francois [1 ,2 ]
Quadrelli, Elsje Alessandra [3 ]
机构
[1] Univ Grenoble Alpes, FR-38000 Grenoble, France
[2] Minatec Campus, CEA, LETI, F-38054 Grenoble 9, France
[3] Univ Claude Bernard Lyon 1, CNRS, Univ Lyon,UMR 5265,CPE Lyon, Ecole Super Chim Phys & Elect Lyon,Lab C2P2, 43 Blvd 11 Novembre 1918, F-69616 Villeurbanne, France
[4] Minatec Campus, CEA, MEM, INAC, F-38054 Grenoble 9, France
来源
关键词
SINGLE-LAYER; WAFER-SCALE; FILMS; DEPOSITION;
D O I
10.1116/1.4996550
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Tungsten disulfide (WS2) monolayers are promising for next-generation flat electronics, but few scalable deposition methods are currently available. Here, the authors report the fabrication of tungsten disulfide monolayers through a novel two-step chemical vapor deposition process involving the deposition of an amorphous tungsten sulfide layer at a relatively mild temperature from the W(CO)(6) and 1,2-ethanedithiol precursors, followed by a short annealing at 800 degrees C under an inert atmosphere. This two-step process allows the fabrication of a crystalline WS2 deposit with a low thermal budget. Raman, x-ray photoelectron, and wavelength dispersive x-ray fluorescence spectroscopic studies performed before and after annealing confirmed the deposition of a sulfur-rich amorphous intermediate, and further confirmed its conversion upon annealing toward oriented 2D WS2 crystals in the 1-2 monolayer range, as corroborated by high-resolution transmission electron microscopy. (C) 2017 American Vacuum Society.
引用
收藏
页数:5
相关论文
共 50 条
  • [41] ANODIC SIO2 FOR LOW-TEMPERATURE GATE DIELECTRICS
    SAYYAH, K
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1988, 135 (03) : C135 - C135
  • [42] LOW-TEMPERATURE ENVIRONMENTAL EFFECTS ON PYROLYTIC SIO2
    KRONGELB, S
    SEDGWICK, TO
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1966, 113 (03) : C63 - &
  • [43] Copper distribution near a SiO2/Si interface under low-temperature annealing
    Hozawa, K
    Isomae, S
    Yugami, J
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 2002, 41 (10): : 5887 - 5893
  • [44] HOLE TRANSPORT IN SIO2 AND REOXIDIZED NITRIDED SIO2 GATE INSULATORS AT LOW-TEMPERATURE
    BOESCH, HE
    DUNN, GJ
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1991, 38 (06) : 1083 - 1088
  • [45] Controllable synthesis of high quality monolayer WS2 on a SiO2/Si substrate by chemical vapor deposition
    Fu, Qi
    Wang, Wenhui
    Yang, Lei
    Huang, Jian
    Zhang, Jingyu
    Xiang, Bin
    RSC ADVANCES, 2015, 5 (21) : 15795 - 15799
  • [46] WS2/WO3 Heterostructure-Based Photodetectors on SiO2/Si for Future Optoelectronics
    Yadav, P. V. Karthik
    Reddy, Y. Ashok Kumar
    ACS APPLIED ELECTRONIC MATERIALS, 2023, 5 (05) : 2538 - 2547
  • [47] PVD growth of spiral pyramid-shaped WS2 on SiO2/Si driven by screw dislocations
    Madoune, Yassine
    Yang, DingBang
    Ahmed, Yameen
    Al-Makeen, Mansour M.
    Huang, Han
    FRONTIERS IN CHEMISTRY, 2023, 11
  • [48] Effect of PECVD Gate SiO2 Thickness on the Poly-Si/SiO2 Interface in Low-Temperature Polycrystalline Silicon TFTs
    Jungmin Park
    Pyungho Choi
    Soonkon Kim
    Bohyeon Jeon
    Jongyoon Lee
    Byoungdeog Choi
    Journal of Electrical Engineering & Technology, 2021, 16 : 1027 - 1033
  • [49] Effect of PECVD Gate SiO2 Thickness on the Poly-Si/SiO2 Interface in Low-Temperature Polycrystalline Silicon TFTs
    Park, Jungmin
    Choi, Pyungho
    Kim, Soonkon
    Jeon, Bohyeon
    Lee, Jongyoon
    Choi, Byoungdeog
    JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY, 2021, 16 (02) : 1027 - 1033
  • [50] Room temperature intrinsic ferromagnetism in pulsed laser ablated few layers of 2D-WS2 on Si/SiO2 substrates
    Sasi, Saranya
    Midhun, P. S.
    Joseph, Anju
    Aneesh, P. M.
    Jayaraj, M. K.
    Reshmi, R.
    MATERIALS TODAY-PROCEEDINGS, 2022, 62 : 5456 - 5459